From patchwork Fri Feb 13 22:05:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Barinov X-Patchwork-Id: 439646 X-Patchwork-Delegate: iwamatsu@nigauri.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 4A8AB1401DA for ; Sat, 14 Feb 2015 09:05:31 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6C0604B97A; Fri, 13 Feb 2015 23:05:27 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1qkmT8Fk8szU; Fri, 13 Feb 2015 23:05:27 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CA1744B977; Fri, 13 Feb 2015 23:05:26 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7494F4B977 for ; Fri, 13 Feb 2015 23:05:24 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XPaCV6FhztN2 for ; Fri, 13 Feb 2015 23:05:24 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-lb0-f171.google.com (mail-lb0-f171.google.com [209.85.217.171]) by theia.denx.de (Postfix) with ESMTPS id 3C4F54B976 for ; Fri, 13 Feb 2015 23:05:21 +0100 (CET) Received: by mail-lb0-f171.google.com with SMTP id b6so18032349lbj.2 for ; Fri, 13 Feb 2015 14:05:20 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:subject:date:message-id; bh=r7o+iPYJjEvTvmoD2XmK47BVOrkQYR+XmVzD5cpYwQ0=; b=TDsY+1OL6JIBxAaZam9PTCf/rb4NCw1aM+AfXG7ryNPk24p2PzRyJL2eC8OZjaghMa IfQnrD2MnJAthFRVG2dlCGUpBfpWSxHMW8jRhs7XIfHZWkbvnVbaFBqFz5MFueCW7/SZ QgM4jR7bv2khLm6o52s25b6PyuoHr0qEaCcqliqhEtuv0Yx75r8naMpibD2XYec5jSMW XvUfKuh4g6O+aSWRozw2uHOzOeBFX41LI0d4uNQ5CXOPD9K746lIK71n9cbxn0OjIaV4 YCyIOnn1WOue3e/XwBwy/WzmucLa6gDQ75ArCqLWKW/CH8he4ub0LdtE9suwwmgt6vaY gEoQ== X-Gm-Message-State: ALoCoQk8hp7itQLfV+TpDkRy7/endYnjciJ0Vj11/TKoOhifElZRBH5/U1JZPzYefMmmLWztbja/ X-Received: by 10.112.12.196 with SMTP id a4mr10495325lbc.8.1423865120553; Fri, 13 Feb 2015 14:05:20 -0800 (PST) Received: from localhost.localdomain ([46.32.73.80]) by mx.google.com with ESMTPSA id r3sm1578273lal.16.2015.02.13.14.05.18 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 13 Feb 2015 14:05:19 -0800 (PST) From: Vladimir Barinov To: u-boot@lists.denx.de, Nobuhiro Iwamatsu Date: Sat, 14 Feb 2015 01:05:18 +0300 Message-Id: <1423865118-13275-1-git-send-email-vladimir.barinov@cogentembedded.com> X-Mailer: git-send-email 1.9.1 Subject: [U-Boot] [U-boot][PATCH] serial: sh: fix internal clock source on SCIF X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The formula to calculate SCIF BRR for R-Car H2/M2/E2 SoCs is as follows: BRR = pclk / (64 * 2^(2n-1) * baudrate) - 1, the prescaler is 0 due to SCSMR settings, hence n=0 Also SCSCR must be set to use internal or external clock source. Signed-off-by: Vladimir Barinov --- drivers/serial/serial_sh.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/serial/serial_sh.h b/drivers/serial/serial_sh.h index 528aa73..941e6ed 100644 --- a/drivers/serial/serial_sh.h +++ b/drivers/serial/serial_sh.h @@ -227,7 +227,8 @@ struct uart_port { #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) # define SCIF_ORER 0x0001 -# define SCSCR_INIT(port) 0x32 /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */ +# define SCSCR_INIT(port) (port->clk_mode == EXT_CLK ? 0x32 : 0x30) + /* TIE=0,RIE=0,TE=1,RE=1,REIE=0, */ #else # error CPU subtype not defined #endif @@ -742,7 +743,7 @@ static inline int scbrr_calc(struct uart_port *port, int bps, int clk) #elif defined(CONFIG_R8A7790) || defined(CONFIG_R8A7791) || \ defined(CONFIG_R8A7793) || defined(CONFIG_R8A7794) #define DL_VALUE(bps, clk) (clk / bps / 16) /* External Clock */ -#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) /* Internal Clock */ +#define SCBRR_VALUE(bps, clk) (clk / bps / 32 - 1) /* Internal Clock */ #else /* Generic SH */ #define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(32*bps)-1) #endif