From patchwork Tue Feb 3 08:10:25 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: fenghua@phytium.com.cn X-Patchwork-Id: 435721 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 05321140182 for ; Tue, 3 Feb 2015 19:11:08 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B7D444A04F; Tue, 3 Feb 2015 09:11:07 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SUCpWw4WCnMb; Tue, 3 Feb 2015 09:11:07 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5C9F04A046; Tue, 3 Feb 2015 09:11:07 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 254434A046 for ; Tue, 3 Feb 2015 09:10:58 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ansIH1juZSML for ; Tue, 3 Feb 2015 09:10:58 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.corpease.net (mail37.corpease.net [61.145.121.42]) by theia.denx.de (Postfix) with ESMTP id 6C3864A040 for ; Tue, 3 Feb 2015 09:10:53 +0100 (CET) Received: from localhost (unknown [111.8.2.139]) by mail37.corpease.net (Coremail) with SMTP id KgGowAA3oOM+gtBUazwtAA--.10774S3; Tue, 03 Feb 2015 16:09:36 +0800 (CST) From: fenghua@phytium.com.cn To: u-boot@lists.denx.de Date: Tue, 3 Feb 2015 16:10:25 +0800 Message-Id: <1422951025-31086-1-git-send-email-fenghua@phytium.com.cn> X-Mailer: git-send-email 1.7.9.5 X-CM-TRANSID: KgGowAA3oOM+gtBUazwtAA--.10774S3 X-Coremail-Antispam: 1UD129KBjvJXoW3Zr13Gw4Utw13CrWfJr1rCrg_yoWkAFWUp3 WDC3Z7GFW5Ga4UA3yIvrWq9r45t3ZYgrZF9ry8uF1UAFy5X348Jr1kKrnxuF97ZFs5Gay8 ZF9agwn8Xr1UXaDanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDU0xBIdaVrnRJUUUvI14x267AKxVWUJVW8JwAFc2x0x2IEx4CE42xK8VAvwI8IcIk0 rVWrJVCq3wAFIxvE14AKwVWUJVWUGwA2ocxC64kIII0Yj41l84x0c7CEw4AK67xGY2AK02 1l84ACjcxK6xIIjxv20xvE14v26r1j6r1xM28EF7xvwVC0I7IYx2IY6xkF7I0E14v26r1j 6r4UM28EF7xvwVC2z280aVAFwI0_Jr0_Gr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4j6r 4UJwAS0I0E0xvYzxvE52x082IY62kv0487Mc02F40EFcxC0VAKzVAqx4xG6I80ewAv7VC0 I7IYx2IY67AKxVWUJVWUGwAv7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r 4UM4x0Y48IcxkI7VAKI48JM4x0x7Aq67IIx4CEVc8vx2IErcIFxwAKzVCY07xG64k0F24l c2xSY4AK67AK6r43MxAIw28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I 0E5I8CrVAFwI0_Jr0_Jr4lx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWU AVWUtwCIc40Y0x0EwIxGrwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcV CY1x0267AKxVWUJVW8JwCI42IY6xAIw20EY4v20xvaj40_WFyUJVCq3wCI42IY6I8E87Iv 67AKxVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf 9x0zRUUUUUUUUU= X-Originating-IP: [111.8.2.139] X-CM-SenderInfo: pihqwxdxd61x51wl3zoofrzhdfq/ Subject: [U-Boot] [RFC PATCH] ARMv8: replace CONFIG_ARM64 with builtin __aarch64__ X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: David Feng This patch replace CONFIG_ARM64 with gcc builtin __aarch64__. CONFIG_ARM64 is still needed in makefile and config.mk. Maybe them could be replace with something like *_V8 later. Signed-off-by: David Feng --- arch/arm/include/asm/cache.h | 2 +- arch/arm/include/asm/config.h | 2 +- arch/arm/include/asm/global_data.h | 4 ++-- arch/arm/include/asm/macro.h | 4 ++-- arch/arm/include/asm/proc-armv/ptrace.h | 6 +++--- arch/arm/include/asm/proc-armv/system.h | 8 ++++---- arch/arm/include/asm/system.h | 6 +++--- arch/arm/include/asm/types.h | 6 +++--- arch/arm/include/asm/u-boot-arm.h | 2 +- arch/arm/include/asm/u-boot.h | 2 +- arch/arm/lib/board.c | 6 +++--- arch/arm/lib/bootm.c | 4 ++-- arch/arm/lib/semihosting.c | 2 +- common/board_f.c | 2 +- common/board_r.c | 2 +- doc/README.arm64 | 4 ++-- drivers/net/smc91111.h | 4 ++-- examples/standalone/stubs.c | 2 +- 18 files changed, 34 insertions(+), 34 deletions(-) diff --git a/arch/arm/include/asm/cache.h b/arch/arm/include/asm/cache.h index 5a4ac2f..3b891bf 100644 --- a/arch/arm/include/asm/cache.h +++ b/arch/arm/include/asm/cache.h @@ -11,7 +11,7 @@ #include -#ifndef CONFIG_ARM64 +#ifndef __aarch64__ /* * Invalidate L2 Cache using co-proc instruction diff --git a/arch/arm/include/asm/config.h b/arch/arm/include/asm/config.h index 7a34a01..319451d 100644 --- a/arch/arm/include/asm/config.h +++ b/arch/arm/include/asm/config.h @@ -10,7 +10,7 @@ #define CONFIG_LMB #define CONFIG_SYS_BOOT_RAMDISK_HIGH -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ #define CONFIG_PHYS_64BIT #define CONFIG_STATIC_RELA #endif diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 438f128..3f12e36 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -61,7 +61,7 @@ static inline gd_t *get_gd(void) { gd_t *gd_ptr; -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ /* * Make will already error that reserving x18 is not supported at the * time of writing, clang: error: unknown argument: '-ffixed-x18' @@ -76,7 +76,7 @@ static inline gd_t *get_gd(void) #else -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18") #else #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9") diff --git a/arch/arm/include/asm/macro.h b/arch/arm/include/asm/macro.h index 1c8c425..781497d 100644 --- a/arch/arm/include/asm/macro.h +++ b/arch/arm/include/asm/macro.h @@ -54,7 +54,7 @@ bcs 1b .endm -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ /* * Register aliases. */ @@ -198,7 +198,7 @@ lr .req x30 .endm #endif -#endif /* CONFIG_ARM64 */ +#endif /* __aarch64__ */ #endif /* __ASSEMBLY__ */ #endif /* __ASM_ARM_MACRO_H__ */ diff --git a/arch/arm/include/asm/proc-armv/ptrace.h b/arch/arm/include/asm/proc-armv/ptrace.h index 71df5a9..dd58324 100644 --- a/arch/arm/include/asm/proc-armv/ptrace.h +++ b/arch/arm/include/asm/proc-armv/ptrace.h @@ -10,7 +10,7 @@ #ifndef __ASM_PROC_PTRACE_H #define __ASM_PROC_PTRACE_H -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ #define PCMASK 0 @@ -27,7 +27,7 @@ struct pt_regs { #endif /* __ASSEMBLY__ */ -#else /* CONFIG_ARM64 */ +#else /* __aarch64__ */ #define USR26_MODE 0x00 #define FIQ26_MODE 0x01 @@ -125,6 +125,6 @@ static inline int valid_user_regs(struct pt_regs *regs) #endif /* __ASSEMBLY__ */ -#endif /* CONFIG_ARM64 */ +#endif /* __aarch64__ */ #endif diff --git a/arch/arm/include/asm/proc-armv/system.h b/arch/arm/include/asm/proc-armv/system.h index c61374e..79231b1 100644 --- a/arch/arm/include/asm/proc-armv/system.h +++ b/arch/arm/include/asm/proc-armv/system.h @@ -13,7 +13,7 @@ /* * Save the current interrupt enable state & disable IRQs */ -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ /* * Save the current interrupt enable state @@ -65,7 +65,7 @@ : "memory"); \ }) -#else /* CONFIG_ARM64 */ +#else /* __aarch64__ */ #define local_irq_save(x) \ ({ \ @@ -161,10 +161,10 @@ : "r" (x) \ : "memory") -#endif /* CONFIG_ARM64 */ +#endif /* __aarch64__ */ #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) || \ - defined(CONFIG_ARM64) + defined(__aarch64__) /* * On the StrongARM, "swp" is terminally broken since it bypasses the * cache totally. This means that the cache becomes inconsistent, and, diff --git a/arch/arm/include/asm/system.h b/arch/arm/include/asm/system.h index 3b0fd0d..cc40197 100644 --- a/arch/arm/include/asm/system.h +++ b/arch/arm/include/asm/system.h @@ -1,7 +1,7 @@ #ifndef __ASM_ARM_SYSTEM_H #define __ASM_ARM_SYSTEM_H -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ /* * SCTLR_EL1/SCTLR_EL2/SCTLR_EL3 bits definitions @@ -80,7 +80,7 @@ void smp_kick_all_cpus(void); #endif /* __ASSEMBLY__ */ -#else /* CONFIG_ARM64 */ +#else /* __aarch64__ */ #ifdef __KERNEL__ @@ -221,6 +221,6 @@ phys_addr_t noncached_alloc(size_t size, size_t align); #endif /* __KERNEL__ */ -#endif /* CONFIG_ARM64 */ +#endif /* __aarch64__ */ #endif diff --git a/arch/arm/include/asm/types.h b/arch/arm/include/asm/types.h index 2326420..fac7cab 100644 --- a/arch/arm/include/asm/types.h +++ b/arch/arm/include/asm/types.h @@ -39,11 +39,11 @@ typedef unsigned int u32; typedef signed long long s64; typedef unsigned long long u64; -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ #define BITS_PER_LONG 64 -#else /* CONFIG_ARM64 */ +#else #define BITS_PER_LONG 32 -#endif /* CONFIG_ARM64 */ +#endif /* Dma addresses are 32-bits wide. */ diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h index f97f3dd..085cd9a 100644 --- a/arch/arm/include/asm/u-boot-arm.h +++ b/arch/arm/include/asm/u-boot-arm.h @@ -52,7 +52,7 @@ void do_software_interrupt(struct pt_regs *pt_regs); void do_prefetch_abort(struct pt_regs *pt_regs); void do_data_abort(struct pt_regs *pt_regs); void do_not_used(struct pt_regs *pt_regs); -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ void do_fiq(struct pt_regs *pt_regs, unsigned int esr); void do_irq(struct pt_regs *pt_regs, unsigned int esr); #else diff --git a/arch/arm/include/asm/u-boot.h b/arch/arm/include/asm/u-boot.h index 43cc494..2dad22f 100644 --- a/arch/arm/include/asm/u-boot.h +++ b/arch/arm/include/asm/u-boot.h @@ -43,7 +43,7 @@ typedef struct bd_info { #endif /* !CONFIG_SYS_GENERIC_BOARD */ /* For image.h:image_check_target_arch() */ -#ifndef CONFIG_ARM64 +#ifndef __aarch64__ #define IH_ARCH_DEFAULT IH_ARCH_ARM #else #define IH_ARCH_DEFAULT IH_ARCH_ARM64 diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index f606255..0ca861b 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -401,7 +401,7 @@ void board_init_f(ulong bootflag) } #endif -#ifndef CONFIG_ARM64 +#ifndef __aarch64__ /* setup stackpointer for exeptions */ gd->irq_sp = addr_sp; #ifdef CONFIG_USE_IRQ @@ -414,10 +414,10 @@ void board_init_f(ulong bootflag) /* 8-byte alignment for ABI compliance */ addr_sp &= ~0x07; -#else /* CONFIG_ARM64 */ +#else /* 16-byte alignment for ABI compliance */ addr_sp &= ~0x0f; -#endif /* CONFIG_ARM64 */ +#endif #else addr_sp += 128; /* leave 32 words for abort-stack */ gd->irq_sp = addr_sp; diff --git a/arch/arm/lib/bootm.c b/arch/arm/lib/bootm.c index 0c1298a..ee0035a 100644 --- a/arch/arm/lib/bootm.c +++ b/arch/arm/lib/bootm.c @@ -187,7 +187,7 @@ static void setup_end_tag(bd_t *bd) __weak void setup_board_tags(struct tag **in_params) {} -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ static void do_nonsec_virt_switch(void) { smp_kick_all_cpus(); @@ -260,7 +260,7 @@ bool armv7_boot_nonsec(void) /* Subcommand: GO */ static void boot_jump_linux(bootm_headers_t *images, int flag) { -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ void (*kernel_entry)(void *fdt_addr, void *res0, void *res1, void *res2); int fake = (flag & BOOTM_STATE_OS_FAKE_GO); diff --git a/arch/arm/lib/semihosting.c b/arch/arm/lib/semihosting.c index fd6d857..ab1d865 100644 --- a/arch/arm/lib/semihosting.c +++ b/arch/arm/lib/semihosting.c @@ -29,7 +29,7 @@ static long smh_trap(unsigned int sysnum, void *addr) { register long result asm("r0"); -#if defined(CONFIG_ARM64) +#if defined(__aarch64__) asm volatile ("hlt #0xf000" : "=r" (result) : "0"(sysnum), "r"(addr)); #else /* Note - untested placeholder */ diff --git a/common/board_f.c b/common/board_f.c index 7953137..ba8bd6d 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -595,7 +595,7 @@ static int reserve_stacks(void) * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() * to handle this and put in arch/xxx/lib/stack.c */ -# if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) +# if defined(CONFIG_ARM) # ifdef CONFIG_USE_IRQ gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", diff --git a/common/board_r.c b/common/board_r.c index 68a9448..9f6db6c 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -866,7 +866,7 @@ void board_init_r(gd_t *new_gd, ulong dest_addr) int i; #endif -#if !defined(CONFIG_X86) && !defined(CONFIG_ARM) && !defined(CONFIG_ARM64) +#if !defined(CONFIG_X86) && !defined(CONFIG_ARM) gd = new_gd; #endif diff --git a/doc/README.arm64 b/doc/README.arm64 index 75586db..bbfe08c 100644 --- a/doc/README.arm64 +++ b/doc/README.arm64 @@ -33,8 +33,8 @@ Notes 5. Generic board is supported. -6. CONFIG_ARM64 instead of CONFIG_ARMV8 is used to distinguish aarch64 and - aarch32 specific codes. +6. __arch64__ is used to distinguish aarch64 and aarch32 specific codes. + CONFIG_ARM64 is used in makefile to select specific source files. Contributor =========== diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h index e19c491..2e57b8d 100644 --- a/drivers/net/smc91111.h +++ b/drivers/net/smc91111.h @@ -277,7 +277,7 @@ struct smc91111_priv{ #define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1)))) #elif CONFIG_BLACKFIN #define SMC_inw(a,r) ({ word __v = (*((volatile word *)((a)->iobase+(r)))); SSYNC(); __v;}) -#elif CONFIG_ARM64 +#elif __aarch64__ #define SMC_inw(a, r) (*((volatile word*)((a)->iobase+((dword)(r))))) #else #define SMC_inw(a, r) (*((volatile word*)((a)->iobase+(r)))) @@ -291,7 +291,7 @@ struct smc91111_priv{ ({ (*((volatile word*)((a)->iobase+((r)))) = d); \ SSYNC(); \ }) -#elif CONFIG_ARM64 +#elif __aarch64__ #define SMC_outw(a, d, r) \ (*((volatile word*)((a)->iobase+((dword)(r)))) = d) #else diff --git a/examples/standalone/stubs.c b/examples/standalone/stubs.c index 920a0a9..a42c23e 100644 --- a/examples/standalone/stubs.c +++ b/examples/standalone/stubs.c @@ -38,7 +38,7 @@ gd_t *global_data; " bctr\n" \ : : "i"(offsetof(gd_t, jt)), "i"(FO(x)) : "r11"); #elif defined(CONFIG_ARM) -#ifdef CONFIG_ARM64 +#ifdef __aarch64__ /* * x18 holds the pointer to the global_data, x9 is a call-clobbered * register