From patchwork Thu Jan 29 09:18:38 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 434400 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B340D14017C for ; Thu, 29 Jan 2015 20:19:24 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8CD3F4B6F9; Thu, 29 Jan 2015 10:19:19 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4gwkxRwgkuip; Thu, 29 Jan 2015 10:19:19 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id F0AE74B700; Thu, 29 Jan 2015 10:19:18 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2CDB74B6E8 for ; Thu, 29 Jan 2015 10:19:13 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id o_F1hphAvZau for ; Thu, 29 Jan 2015 10:19:13 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f48.google.com (mail-pa0-f48.google.com [209.85.220.48]) by theia.denx.de (Postfix) with ESMTPS id A1F324B6A7 for ; Thu, 29 Jan 2015 10:19:08 +0100 (CET) Received: by mail-pa0-f48.google.com with SMTP id ey11so36831805pad.7 for ; Thu, 29 Jan 2015 01:19:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=2ffIcX/qD6fhlL50P2sw3m6Ij7E6IJU6TRHeAF+YGp4=; b=CAsWMOThEc0cC1rjkN4IxmuA16IYhUizhVhYpZ3m551l2qTkL7AU9oG8NlcM7OB5e6 pVr3Z/pdzSkfauQgJamb5VylUgMegvcz95mpjU0NIdVk0WK7DzJilFsrayTOWQWGG1HY yeJyKaJW6wRhQYkaJIJwXCylvS+pkfY1CL/4xGfFuC+BtGmgTnc3arvNEFAAWzSlbzxf qKjhrcehBhHtCREN8ctIDZdH2DlzwpAddRgEdyqT+sV2l45d0dV5vmCYncuTBUfd4zam ntYnCmnflVLocVcjXTmaXTA0F/ipInekBxeKWKu41UvBLU6Q+qpME09PW0DIrGkw0y3M 22TA== X-Received: by 10.70.90.100 with SMTP id bv4mr12737029pdb.29.1422523147092; Thu, 29 Jan 2015 01:19:07 -0800 (PST) Received: from localhost ([106.120.101.38]) by mx.google.com with ESMTPSA id jw8sm7082210pbc.73.2015.01.29.01.19.04 (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 29 Jan 2015 01:19:06 -0800 (PST) From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Thu, 29 Jan 2015 17:18:38 +0800 Message-Id: <1422523121-7758-4-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1422523121-7758-1-git-send-email-bmeng.cn@gmail.com> References: <1422523121-7758-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [RFC PATCH v2 3/6] x86: quark: Add Cache-As-RAM initialization X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Quark SoC contains an embedded 512KiB SRAM (eSRAM) that is initialized by hardware. eSRAM is the ideal place to be used for Cache-As-RAM (CAR) before system memory is available. Signed-off-by: Bin Meng --- Changes in v2: - Replace upper case register names (EAX etc.) with lower case - Use some macros from and arch/x86/cpu/quark/car.S | 104 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 arch/x86/cpu/quark/car.S diff --git a/arch/x86/cpu/quark/car.S b/arch/x86/cpu/quark/car.S new file mode 100644 index 0000000..f32f9b1 --- /dev/null +++ b/arch/x86/cpu/quark/car.S @@ -0,0 +1,104 @@ +/* + * Copyright (C) 2015, Bin Meng + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +.globl car_init +car_init: + post_code(POST_CAR_START) + + /* + * Quark SoC contains an embedded 512KiB SRAM (eSRAM) that is + * initialized by hardware. eSRAM is the ideal place to be used + * for Cache-As-RAM (CAR) before system memory is available. + * + * Relocate this eSRAM to a suitable location in the physical + * memory map and enable it. + */ + + /* Host Memory Bound Register P03h:R08h */ + mov $((0x03 << 16) | (0x08 << 8)), %eax + mov $(DRAM_BASE + DRAM_MAX_SIZE + ESRAM_SIZE), %edx + lea 1f, %esp + jmp msg_port_write +1: + + /* eSRAM Block Page Control Register P05h:R82h */ + mov $((0x05 << 16) | (0x82 << 8)), %eax + mov $(ESRAM_BLOCK_MODE | (CONFIG_ESRAM_BASE >> 24)), %edx + lea 2f, %esp + jmp msg_port_write +2: + + post_code(POST_CAR_CPU_CACHE) + jmp car_init_ret + +msg_port_read: + /* + * Parameter: + * eax[23:16] - Message Port ID + * eax[15:08] - Register Address + * + * Return Value: + * eax - Message Port Register value + * + * Return Address: esp + */ + + or $((MSG_OP_READ << 24) | MSG_BYTE_ENABLE), %eax + mov %eax, %ebx + + /* Write MCR B0:D0:F0:RD0 */ + mov $((1 << 31) | MSG_CTRL_REG), %eax + mov $0xcf8, %dx + out %eax, %dx + mov $0xcfc, %dx + mov %ebx, %eax + out %eax, %dx + + /* Read MDR B0:D0:F0:RD4 */ + mov $((1 << 31) | MSG_DATA_REG), %eax + mov $0xcf8, %dx + out %eax, %dx + mov $0xcfc, %dx + in %dx, %eax + + jmp *%esp + +msg_port_write: + /* + * Parameter: + * eax[23:16] - Message Port ID + * eax[15:08] - Register Address + * edx - Message Port Register value to write + * + * Return Address: esp + */ + + or $((MSG_OP_WRITE << 24) | MSG_BYTE_ENABLE), %eax + mov %eax, %esi + mov %edx, %edi + + /* Write MDR B0:D0:F0:RD4 */ + mov $((1 << 31) | MSG_DATA_REG), %eax + mov $0xcf8, %dx + out %eax, %dx + mov $0xcfc, %dx + mov %edi, %eax + out %eax, %dx + + /* Write MCR B0:D0:F0:RD0 */ + mov $((1 << 31) | MSG_CTRL_REG), %eax + mov $0xcf8, %dx + out %eax, %dx + mov $0xcfc, %dx + mov %esi, %eax + out %eax, %dx + + jmp *%esp