From patchwork Fri Jan 16 15:25:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 429884 X-Patchwork-Delegate: p.marczak@samsung.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 65C2E14018C for ; Sat, 17 Jan 2015 02:26:05 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B54614B659; Fri, 16 Jan 2015 16:26:02 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id maF4kEpdUBKA; Fri, 16 Jan 2015 16:26:02 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 503554B628; Fri, 16 Jan 2015 16:26:02 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CCA3A4B61D for ; Fri, 16 Jan 2015 16:25:55 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DAcz+h80rkFC for ; Fri, 16 Jan 2015 16:25:55 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1on0140.outbound.protection.outlook.com [157.56.110.140]) by theia.denx.de (Postfix) with ESMTPS id 9ED4B4B61E for ; Fri, 16 Jan 2015 16:25:52 +0100 (CET) Received: from CO2PR03CA0018.namprd03.prod.outlook.com (10.141.194.145) by DM2PR0301MB0688.namprd03.prod.outlook.com (25.160.96.26) with Microsoft SMTP Server (TLS) id 15.1.59.20; Fri, 16 Jan 2015 15:25:48 +0000 Received: from BN1BFFO11FD005.protection.gbl (2a01:111:f400:7c10::1:169) by CO2PR03CA0018.outlook.office365.com (2a01:111:e400:1414::17) with Microsoft SMTP Server (TLS) id 15.1.59.20 via Frontend Transport; Fri, 16 Jan 2015 15:25:48 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BN1BFFO11FD005.mail.protection.outlook.com (10.58.144.68) with Microsoft SMTP Server (TLS) id 15.1.59.14 via Frontend Transport; Fri, 16 Jan 2015 15:25:47 +0000 Received: from linux-jyl1.am.freescale.net ([10.192.185.229]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id t0GFPJ62019548; Fri, 16 Jan 2015 08:25:45 -0700 From: Peng Fan To: , Date: Fri, 16 Jan 2015 23:25:15 +0800 Message-ID: <1421421917-20864-2-git-send-email-Peng.Fan@freescale.com> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1421421917-20864-1-git-send-email-Peng.Fan@freescale.com> References: <1421421917-20864-1-git-send-email-Peng.Fan@freescale.com> X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=Peng.Fan@freescale.com; X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(199003)(189002)(50466002)(85426001)(47776003)(48376002)(64706001)(229853001)(92566002)(6806004)(69596002)(19580395003)(104016003)(81156004)(19580405001)(106466001)(50226001)(77156002)(87936001)(62966003)(105606002)(86362001)(46102003)(36756003)(2950100001)(50986999)(76176999)(68736005)(77096005)(97736003); DIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR0301MB0688; H:az84smr01.freescale.net; FPR:; SPF:Fail; MLV:sfv; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-DmarcAction-Test: None X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(3005004);SRVR:DM2PR0301MB0688; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004); SRVR:DM2PR0301MB0688; X-Forefront-PRVS: 04583CED1A X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:; SRVR:DM2PR0301MB0688; X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jan 2015 15:25:47.7347 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.158.2] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR0301MB0688 Cc: fabio.estevam@freescale.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 1/3] pmic:pfuz100 add switch mode and more registers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add more pfuze register offset. And switch mode definition. Signed-off-by: Peng Fan --- Changes v3: none Changes v2: none include/power/pfuze100_pmic.h | 53 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) diff --git a/include/power/pfuze100_pmic.h b/include/power/pfuze100_pmic.h index 1118489..7474afb 100644 --- a/include/power/pfuze100_pmic.h +++ b/include/power/pfuze100_pmic.h @@ -16,14 +16,34 @@ enum { PFUZE100_SW1ABVOL = 0x20, PFUZE100_SW1ABSTBY = 0x21, + PFUZE100_SW1ABOFF = 0x22, + PFUZE100_SW1ABMODE = 0x23, PUZE_100_SW1ABCONF = 0x24, PFUZE100_SW1CVOL = 0x2e, PFUZE100_SW1CSTBY = 0x2f, + PFUZE100_SW1COFF = 0x30, + PFUZE100_SW1CMODE = 0x31, PFUZE100_SW1CCONF = 0x32, PFUZE100_SW2VOL = 0x35, + PFUZE100_SW2STBY = 0x36, + PFUZE100_SW2OFF = 0x37, + PFUZE100_SW2MODE = 0x38, + PFUZE100_SW2CONF = 0x39, PFUZE100_SW3AVOL = 0x3c, + PFUZE100_SW3ASTBY = 0x3D, + PFUZE100_SW3AOFF = 0x3E, + PFUZE100_SW3AMODE = 0x3F, + PFUZE100_SW3ACONF = 0x40, PFUZE100_SW3BVOL = 0x43, + PFUZE100_SW3BSTBY = 0x44, + PFUZE100_SW3BOFF = 0x45, + PFUZE100_SW3BMODE = 0x46, + PFUZE100_SW3BCONF = 0x47, PFUZE100_SW4VOL = 0x4a, + PFUZE100_SW4STBY = 0x4b, + PFUZE100_SW4OFF = 0x4c, + PFUZE100_SW4MODE = 0x4d, + PFUZE100_SW4CONF = 0x4e, PFUZE100_SWBSTCON1 = 0x66, PFUZE100_VREFDDRCON = 0x6a, PFUZE100_VSNVSVOL = 0x6b, @@ -177,5 +197,38 @@ enum { #define SWBST_MODE_AUTO (2 << 2) #define SWBST_MODE_APS (2 << 3) +/* + * Regulator Mode Control + * + * OFF: The regulator is switched off and the output voltage is discharged. + * PFM: In this mode, the regulator is always in PFM mode, which is useful + * at light loads for optimized efficiency. + * PWM: In this mode, the regulator is always in PWM mode operation + * regardless of load conditions. + * APS: In this mode, the regulator moves automatically between pulse + * skipping mode and PWM mode depending on load conditions. + * + * SWxMODE[3:0] + * Normal Mode | Standby Mode | value + * OFF OFF 0x0 + * PWM OFF 0x1 + * PFM OFF 0x3 + * APS OFF 0x4 + * PWM PWM 0x5 + * PWM APS 0x6 + * APS APS 0x8 + * APS PFM 0xc + * PWM PFM 0xd + */ +#define OFF_OFF 0x0 +#define PWM_OFF 0x1 +#define PFM_OFF 0x3 +#define APS_OFF 0x4 +#define PWM_PWM 0x5 +#define PWM_APS 0x6 +#define APS_APS 0x8 +#define APS_PFM 0xc +#define PWM_PFM 0xd + int power_pfuze100_init(unsigned char bus); #endif