From patchwork Thu Jan 15 03:11:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peng Fan X-Patchwork-Id: 429219 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E342114015A for ; Thu, 15 Jan 2015 14:12:12 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2FCCD4B68A; Thu, 15 Jan 2015 04:12:10 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5hd4BDERWJOm; Thu, 15 Jan 2015 04:12:10 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CD66C4B67F; Thu, 15 Jan 2015 04:12:09 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CE0CB4B67F for ; Thu, 15 Jan 2015 04:12:05 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id NsVclIh9jEa4 for ; Thu, 15 Jan 2015 04:12:05 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1bbn0107.outbound.protection.outlook.com [157.56.111.107]) by theia.denx.de (Postfix) with ESMTPS id 2AE904B67D for ; Thu, 15 Jan 2015 04:12:02 +0100 (CET) Received: from CO2PR03CA0048.namprd03.prod.outlook.com (10.141.194.175) by DM2PR0301MB0686.namprd03.prod.outlook.com (25.160.96.24) with Microsoft SMTP Server (TLS) id 15.1.53.17; Thu, 15 Jan 2015 03:11:59 +0000 Received: from BY2FFO11FD011.protection.gbl (2a01:111:f400:7c0c::154) by CO2PR03CA0048.outlook.office365.com (2a01:111:e400:1414::47) with Microsoft SMTP Server (TLS) id 15.1.53.17 via Frontend Transport; Thu, 15 Jan 2015 03:11:58 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BY2FFO11FD011.mail.protection.outlook.com (10.1.14.129) with Microsoft SMTP Server (TLS) id 15.1.59.14 via Frontend Transport; Thu, 15 Jan 2015 03:11:57 +0000 Received: from linux-jyl1.ap.freescale.net (b51431-11.ap.freescale.net [10.193.102.40]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id t0F3BZ9V004426; Wed, 14 Jan 2015 20:11:56 -0700 From: Peng Fan To: Date: Thu, 15 Jan 2015 11:11:28 +0800 Message-ID: <1421291488-24249-1-git-send-email-Peng.Fan@freescale.com> X-Mailer: git-send-email 1.8.4 X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=Peng.Fan@freescale.com; X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(339900001)(199003)(189002)(85664002)(50986999)(81156004)(106466001)(97736003)(48376002)(50466002)(46102003)(36756003)(77156002)(62966003)(69596002)(87936001)(92566002)(6806004)(47776003)(64706001)(229853001)(19580395003)(85426001)(105606002)(86362001)(110136001)(2351001)(19580405001)(68736005)(77096005)(50226001)(104016003); DIR:OUT; SFP:1102; SCL:1; SRVR:DM2PR0301MB0686; H:az84smr01.freescale.net; FPR:; SPF:Fail; MLV:sfv; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; MIME-Version: 1.0 X-DmarcAction-Test: None X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(3005004);SRVR:DM2PR0301MB0686; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:(601004); SRVR:DM2PR0301MB0686; X-Forefront-PRVS: 0457F11EAF X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:; SRVR:DM2PR0301MB0686; X-OriginatorOrg: freescale.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Jan 2015 03:11:57.9397 (UTC) X-MS-Exchange-CrossTenant-Id: 710a03f5-10f6-4d38-9ff4-a80b81da590d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=710a03f5-10f6-4d38-9ff4-a80b81da590d; Ip=[192.88.158.2] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM2PR0301MB0686 Cc: fabio.estevam@freescale.com, u-boot@lists.denx.de Subject: [U-Boot] [PATCH] imx6: disable bandgap self-bias circuit after boot X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The self-bias circuit is used by the bandgap during startup. Once the bandgap has stabilized, the self-bias circuit should be disabled for best noise performance of analog blocks. Also this bit should be disabled before the chip enters STOP mode or when ever the regular bandgap is disabled. Signed-off-by: Peng Fan Signed-off-by: Ranjani Vaidyanathan --- arch/arm/cpu/armv7/mx6/soc.c | 24 ++++++++++++++++++++++++ arch/arm/include/asm/arch-mx6/crm_regs.h | 2 ++ 2 files changed, 26 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 5f5f497..36572c6 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -255,6 +255,23 @@ static void clear_mmdc_ch_mask(void) writel(0, &mxc_ccm->ccdr); } +static void init_bandgap(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + /* + * Ensure the bandgap has stabilized. + */ + while (!(readl(&mxc_ccm->ana_misc0) & 0x80)) + ; + /* + * For best noise performance of the analog blocks using the + * outputs of the bandgap, the reftop_selfbiasoff bit should + * be set. + */ + writel(BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF, &mxc_ccm->ana_misc0_set); +} + + #ifdef CONFIG_MX6SL static void set_preclk_from_osc(void) { @@ -275,6 +292,13 @@ int arch_cpu_init(void) clear_mmdc_ch_mask(); /* + * Disable self-bias circuit in the analog bandap. + * The self-bias circuit is used by the bandgap during startup. + * This bit should be set after the bandgap has initialized. + */ + init_bandgap(); + + /* * When low freq boot is enabled, ROM will not set AHB * freq, so we need to ensure AHB freq is 132MHz in such * scenario. diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h index 39f3c07..0592ce0 100644 --- a/arch/arm/include/asm/arch-mx6/crm_regs.h +++ b/arch/arm/include/asm/arch-mx6/crm_regs.h @@ -1063,4 +1063,6 @@ struct mxc_ccm_reg { #define BF_ANADIG_PFD_528_PFD0_FRAC(v) \ (((v) << 0) & BM_ANADIG_PFD_528_PFD0_FRAC) +#define BM_ANADIG_ANA_MISC0_REFTOP_SELBIASOFF 0x00000008 + #endif /*__ARCH_ARM_MACH_MX6_CCM_REGS_H__ */