From patchwork Tue Jan 6 14:14:15 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 425684 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 4FE8A14009B for ; Wed, 7 Jan 2015 01:15:16 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 188854B605; Tue, 6 Jan 2015 15:15:05 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qme8GS0GybpO; Tue, 6 Jan 2015 15:15:04 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 51A3C4B60F; Tue, 6 Jan 2015 15:15:04 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3E9174B62B for ; Tue, 6 Jan 2015 15:14:57 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id EcbQ2aa3+kzx for ; Tue, 6 Jan 2015 15:14:57 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f175.google.com (mail-pd0-f175.google.com [209.85.192.175]) by theia.denx.de (Postfix) with ESMTPS id 5CA9A4B5FA for ; Tue, 6 Jan 2015 15:14:52 +0100 (CET) Received: by mail-pd0-f175.google.com with SMTP id g10so30487787pdj.34 for ; Tue, 06 Jan 2015 06:14:51 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=IKuXDmURD73xRNdO+g2/JVHrwq4M9+VZDp8ma+6nwpc=; b=ZzcjA7tJ8syqxiJkyotxy57sUotZ57ndw7N9Rx22znFUouqNwm+stL98Atet28SyNN 8GL+CMy0TfUArh95SeUB9yV0mej+IFyo1fLDu0o6SxfqUSVUsRt7szoNV/ZwlHiXavX7 hruLyS9zpp2erXDKEIwTntiaV9W5tswJQffBUH+SduKY4XblqAMrCgIek2XvYNZ4djfC f+xg1KWC88jKHFpxxaMjNlzJ5uV1fOEX/wizkaKsFMYx/G07OuWOCVkfBX3cEl7mzHnr 3/EOnsdrmWeUQpRbqlBPXl2t58QmvkMuRxByeTEhSsAIus1gtIfs561FCuH4QrmjHB27 75Fg== X-Received: by 10.68.68.172 with SMTP id x12mr158147394pbt.71.1420553691530; Tue, 06 Jan 2015 06:14:51 -0800 (PST) Received: from localhost ([106.120.101.38]) by mx.google.com with ESMTPSA id lb11sm6673708pab.0.2015.01.06.06.14.49 (version=TLSv1 cipher=RC4-SHA bits=128/128); Tue, 06 Jan 2015 06:14:51 -0800 (PST) From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Tue, 6 Jan 2015 22:14:15 +0800 Message-Id: <1420553664-3281-4-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1420553664-3281-1-git-send-email-bmeng.cn@gmail.com> References: <1420553664-3281-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [RESEND PATCH v4 03/12] x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Convert CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig options so that we can remove them from board configuration file. Signed-off-by: Bin Meng Acked-by: Simon Glass --- Changes in v4: None Changes in v3: None Changes in v2: - New patch to move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to Kconfig arch/x86/Kconfig | 9 +++++++++ board/google/chromebook_link/Kconfig | 1 + board/intel/crownbay/Kconfig | 1 + include/configs/chromebook_link.h | 2 -- include/configs/crownbay.h | 2 -- 5 files changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index ffcb4cb..ba0c1aa 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -66,6 +66,15 @@ config SMM_TSEG config SMM_TSEG_SIZE hex +config X86_RESET_VECTOR + bool + default n + +config SYS_X86_START16 + hex + depends on X86_RESET_VECTOR + default 0xfffff800 + config BOARD_ROMSIZE_KB_512 bool config BOARD_ROMSIZE_KB_1024 diff --git a/board/google/chromebook_link/Kconfig b/board/google/chromebook_link/Kconfig index 7f79fd2..a9a55e8 100644 --- a/board/google/chromebook_link/Kconfig +++ b/board/google/chromebook_link/Kconfig @@ -14,6 +14,7 @@ config SYS_CONFIG_NAME config BOARD_SPECIFIC_OPTIONS # dummy def_bool y + select X86_RESET_VECTOR select CPU_INTEL_SOCKET_RPGA989 select NORTHBRIDGE_INTEL_IVYBRIDGE select SOUTHBRIDGE_INTEL_C216 diff --git a/board/intel/crownbay/Kconfig b/board/intel/crownbay/Kconfig index 4709f9b..762663a 100644 --- a/board/intel/crownbay/Kconfig +++ b/board/intel/crownbay/Kconfig @@ -14,6 +14,7 @@ config SYS_CONFIG_NAME config BOARD_SPECIFIC_OPTIONS # dummy def_bool y + select X86_RESET_VECTOR select INTEL_QUEENSBAY select BOARD_ROMSIZE_KB_1024 diff --git a/include/configs/chromebook_link.h b/include/configs/chromebook_link.h index 8930210..449f0c2 100644 --- a/include/configs/chromebook_link.h +++ b/include/configs/chromebook_link.h @@ -19,11 +19,9 @@ #define CONFIG_SYS_CAR_SIZE (128 * 1024) #define CONFIG_SYS_MONITOR_LEN (1 << 20) #define CONFIG_DCACHE_RAM_MRC_VAR_SIZE 0x4000 -#define CONFIG_SYS_X86_START16 0xfffff800 #define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_DISPLAY_CPUINFO -#define CONFIG_X86_RESET_VECTOR #define CONFIG_NR_DRAM_BANKS 8 #define CONFIG_X86_MRC_ADDR 0xfffa0000 #define CONFIG_CACHE_MRC_SIZE_KB 512 diff --git a/include/configs/crownbay.h b/include/configs/crownbay.h index eadb339..b927b1c 100644 --- a/include/configs/crownbay.h +++ b/include/configs/crownbay.h @@ -14,10 +14,8 @@ #include #define CONFIG_SYS_MONITOR_LEN (1 << 20) -#define CONFIG_SYS_X86_START16 0xfffff800 #define CONFIG_BOARD_EARLY_INIT_F -#define CONFIG_X86_RESET_VECTOR #define CONFIG_NR_DRAM_BANKS 1 #define CONFIG_X86_SERIAL