From patchwork Tue Jan 6 05:20:08 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 425536 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1E8D614009B for ; Tue, 6 Jan 2015 16:21:15 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D8D784B653; Tue, 6 Jan 2015 06:21:03 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2K5KICmAZx1i; Tue, 6 Jan 2015 06:21:03 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6BCA74B6AD; Tue, 6 Jan 2015 06:20:58 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 4491E4B69E for ; Tue, 6 Jan 2015 06:20:54 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1PzwFEbQayuc for ; Tue, 6 Jan 2015 06:20:54 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f50.google.com (mail-pa0-f50.google.com [209.85.220.50]) by theia.denx.de (Postfix) with ESMTPS id 580E74B65A for ; Tue, 6 Jan 2015 06:20:52 +0100 (CET) Received: by mail-pa0-f50.google.com with SMTP id bj1so30090925pad.23 for ; Mon, 05 Jan 2015 21:20:50 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=eZTqGHaoFi9QQVysdn0mLTrBPJHzfxALn1MoCyUBgaE=; b=BnLF0EYuPjNFydSmdNsCC9vZRtaTLKHezS154MoOiQeb2Nv0L15M7jTt7RZPYmXIf/ faG2pqCxIfmnHqSfRgGOE1JFGyev06YK42caLSJUEk/zj3DfM4kivjC7yY9cN91uAhG9 FksPHPstbKP6HxFktbnAmrZ9EW/8LVbNCBHEEM16CuuG//QiD4+OGyeM9lAAETXnhWjH xBRXJJLr603JB+8X6R695vkH0u+PgyAClqlIDoMdCq/CXOoGTU+TynLrBOWX2TFSEU9C rRZJ9Qa7sV+3y1J7yBNuEgnpmpv2nCNuLBQjyf2pDP0bWc3rYY068rN7By80drd7W7lZ dnrA== X-Received: by 10.66.66.203 with SMTP id h11mr101132249pat.131.1420521650916; Mon, 05 Jan 2015 21:20:50 -0800 (PST) Received: from localhost ([106.120.101.38]) by mx.google.com with ESMTPSA id uq15sm56086060pab.8.2015.01.05.21.20.49 (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 05 Jan 2015 21:20:50 -0800 (PST) From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Tue, 6 Jan 2015 13:20:08 +0800 Message-Id: <1420521614-13175-7-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1420521614-13175-1-git-send-email-bmeng.cn@gmail.com> References: <1420521614-13175-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH v4 06/12] x86: coreboot: Move coreboot-specific defines from coreboot.h to Kconfig X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de There are many places in the U-Boot source tree which refer to CONFIG_SYS_COREBOOT, CONFIG_CBMEM_CONSOLE and CONFIG_VIDEO_COREBOOT that is currently defined in coreboot.h. Move them to arch/x86/cpu/coreboot/Kconfig so that we can switch to board configuration file to build U-Boot later. Signed-off-by: Bin Meng --- Changes in v4: None Changes in v3: - Make coreboot options wrapped by TARGET_COREBOOT - Remove these options from include/configs/coreboot.h for bisectability Changes in v2: - New patch to move coreboot specific defines from coreboot.h to Kconfig arch/x86/Kconfig | 2 ++ arch/x86/cpu/coreboot/Kconfig | 15 +++++++++++++++ include/configs/coreboot.h | 5 ----- 3 files changed, 17 insertions(+), 5 deletions(-) create mode 100644 arch/x86/cpu/coreboot/Kconfig diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 25f6a7b..5fad9c4 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -343,6 +343,8 @@ config TSC_FREQ_IN_MHZ help The running frequency in MHz of Time-Stamp Counter (TSC). +source "arch/x86/cpu/coreboot/Kconfig" + source "arch/x86/cpu/ivybridge/Kconfig" source "arch/x86/cpu/queensbay/Kconfig" diff --git a/arch/x86/cpu/coreboot/Kconfig b/arch/x86/cpu/coreboot/Kconfig new file mode 100644 index 0000000..e0e3c64 --- /dev/null +++ b/arch/x86/cpu/coreboot/Kconfig @@ -0,0 +1,15 @@ +if TARGET_COREBOOT + +config SYS_COREBOOT + bool + default y + +config CBMEM_CONSOLE + bool + default y + +config VIDEO_COREBOOT + bool + default y + +endif diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index 990a2d1..a0d9952 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -19,7 +19,6 @@ * High Level Configuration Options * (easy to change) */ -#define CONFIG_SYS_COREBOOT #define CONFIG_LAST_STAGE_INIT #define CONFIG_SYS_EARLY_PCI_INIT @@ -55,10 +54,6 @@ "stdout=vga,serial,cbmem\0" \ "stderr=vga,serial,cbmem\0" -#define CONFIG_CBMEM_CONSOLE - -#define CONFIG_VIDEO_COREBOOT - #define CONFIG_NR_DRAM_BANKS 4 #define CONFIG_TRACE