From patchwork Tue Jan 6 04:20:34 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 425519 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D871314009B for ; Tue, 6 Jan 2015 15:22:05 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 675824B6C6; Tue, 6 Jan 2015 05:21:35 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pX5FtgDQRdfI; Tue, 6 Jan 2015 05:21:35 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C2EFF4B6CD; Tue, 6 Jan 2015 05:21:28 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1D1094B669 for ; Tue, 6 Jan 2015 05:21:25 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Z2WO+CY0dFLV for ; Tue, 6 Jan 2015 05:21:25 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f175.google.com (mail-pd0-f175.google.com [209.85.192.175]) by theia.denx.de (Postfix) with ESMTPS id 4C9EE4B6AF for ; Tue, 6 Jan 2015 05:21:24 +0100 (CET) Received: by mail-pd0-f175.google.com with SMTP id g10so29431554pdj.6 for ; Mon, 05 Jan 2015 20:21:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:subject:date:message-id:in-reply-to:references; bh=3DXDx9/+4EPkd/fSjcKfmuTxJVv4nWrRhNgNyIJC7tY=; b=KZAtdE5YKOeDUDoua4y+EAuQ0ie3+1LNU8UBUioB/Ll6kZySYJUV/zIn4NUK+1V8dX T3acslsGeRHYYJ7dOXiFdd9SccSu/5J3Kt/FW2pTIVlPOa+u/KLMJfhzNvyQdYv76/qo PBZq8MX3ynGm8fWj9rbl5h4VzcTJ1SLUwA6fcq+JQuOEgScbn4j6xJFm8KAHf1wCIHBJ rUqAIDpMoweAvF7eD3BMXoLciRLtEGtduw6El0rBR2EdDMxmujHW6RPZPMZymhbjpfK9 eB4/xEjLY8d/BXzzj4Rpu+oya3uSVawrmHSzbCkRc7OSP0ywbIe4OckDpIoM16wWsZ0y 3pWw== X-Received: by 10.70.94.136 with SMTP id dc8mr139103427pdb.37.1420518082943; Mon, 05 Jan 2015 20:21:22 -0800 (PST) Received: from localhost ([106.120.101.38]) by mx.google.com with ESMTPSA id wf5sm56005401pab.40.2015.01.05.20.21.20 (version=TLSv1 cipher=RC4-SHA bits=128/128); Mon, 05 Jan 2015 20:21:22 -0800 (PST) From: Bin Meng To: Simon Glass , U-Boot Mailing List Date: Tue, 6 Jan 2015 12:20:34 +0800 Message-Id: <1420518038-18983-9-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.8.2.1 In-Reply-To: <1420518038-18983-1-git-send-email-bmeng.cn@gmail.com> References: <1420518038-18983-1-git-send-email-bmeng.cn@gmail.com> Subject: [U-Boot] [PATCH v3 08/12] x86: Remove include/configs/coreboot.h X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Since we already swtiched to use the new mechanism for building U-Boot for coreboot, coreboot.h is no longer needed so remove it. Signed-off-by: Bin Meng Acked-by: Simon Glass --- Changes in v3: None Changes in v2: - New patch to remove include/configs/coreboot.h board/coreboot/coreboot/MAINTAINERS | 2 +- include/configs/coreboot.h | 70 ------------------------------------- 2 files changed, 1 insertion(+), 71 deletions(-) delete mode 100644 include/configs/coreboot.h diff --git a/board/coreboot/coreboot/MAINTAINERS b/board/coreboot/coreboot/MAINTAINERS index 6ce66f5..2736aa0 100644 --- a/board/coreboot/coreboot/MAINTAINERS +++ b/board/coreboot/coreboot/MAINTAINERS @@ -2,5 +2,5 @@ COREBOOT BOARD M: Simon Glass S: Maintained F: board/coreboot/coreboot/ -F: include/configs/coreboot.h +F: include/configs/chromebook_link.h F: configs/coreboot-x86_defconfig diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h deleted file mode 100644 index a0d9952..0000000 --- a/include/configs/coreboot.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2008 - * Graeme Russ, graeme.russ@gmail.com. - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -/* - * board/config.h - configuration options, board specific - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_LAST_STAGE_INIT -#define CONFIG_SYS_EARLY_PCI_INIT - -#define CONFIG_SYS_CAR_ADDR 0x19200000 -#define CONFIG_SYS_CAR_SIZE (16 * 1024) -#define CONFIG_SYS_MONITOR_LEN (256 * 1024) - -#define CONFIG_TRACE_EARLY_SIZE (8 << 20) -#define CONFIG_TRACE_EARLY -#define CONFIG_TRACE_EARLY_ADDR 0x01400000 - -#define CONFIG_BOOTSTAGE -#define CONFIG_BOOTSTAGE_REPORT -#define CONFIG_BOOTSTAGE_FDT -#define CONFIG_CMD_BOOTSTAGE -/* Place to stash bootstage data from first-stage U-Boot */ -#define CONFIG_BOOTSTAGE_STASH 0x0110f000 -#define CONFIG_BOOTSTAGE_STASH_SIZE 0x7fc -#define CONFIG_BOOTSTAGE_USER_COUNT 60 - -#define CONFIG_SCSI_DEV_LIST {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_NM10_AHCI}, \ - {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_MOBILE}, \ - {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_COUGARPOINT_AHCI_SERIES6}, \ - {PCI_VENDOR_ID_INTEL, \ - PCI_DEVICE_ID_INTEL_PANTHERPOINT_AHCI_MOBILE} - -#define CONFIG_X86_SERIAL - -#define CONFIG_STD_DEVICES_SETTINGS "stdin=usbkbd,vga,serial\0" \ - "stdout=vga,serial,cbmem\0" \ - "stderr=vga,serial,cbmem\0" - -#define CONFIG_NR_DRAM_BANKS 4 - -#define CONFIG_TRACE -#define CONFIG_CMD_TRACE -#define CONFIG_TRACE_BUFFER_SIZE (16 << 20) - -#define CONFIG_BOOTDELAY 2 - -#define CONFIG_CROS_EC -#define CONFIG_CROS_EC_LPC -#define CONFIG_CMD_CROS_EC -#define CONFIG_ARCH_EARLY_INIT_R - -#endif /* __CONFIG_H */