From patchwork Wed Dec 10 05:25:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 419410 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 42C491400A0 for ; Wed, 10 Dec 2014 16:27:34 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C8E974B705; Wed, 10 Dec 2014 06:27:21 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id hwu4r0gUtt1P; Wed, 10 Dec 2014 06:27:21 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 471FB4B737; Wed, 10 Dec 2014 06:26:26 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 947F14B6BD for ; Wed, 10 Dec 2014 06:25:51 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7IGmsZdaRnH1 for ; Wed, 10 Dec 2014 06:25:51 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-oi0-f73.google.com (mail-oi0-f73.google.com [209.85.218.73]) by theia.denx.de (Postfix) with ESMTPS id AC9CF4B692 for ; Wed, 10 Dec 2014 06:25:42 +0100 (CET) Received: by mail-oi0-f73.google.com with SMTP id a141so268762oig.2 for ; Tue, 09 Dec 2014 21:25:41 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ry0dwSyrrNuh3NMm0VpUJkd5w0P7PB3TKi3zf7oJJZU=; b=BNUiHFUig6iYQYGBg/u6zcGO+OfJcgj3+32wtlN1aJ+guk6SelkZmU00LqCEnb+U4h hhfqrIdod4/NKCj/NnYLimOFq1+SaD/hBLRoXHac70agEGF+JZbUqnU/Gvt+XxX7E2RC 8pZCSiXBPe0/Fu8cuGc9bpEQ6jEc+YckM1djD72a9jeRtxky00q1+L9nHYJ2Od4Wuk36 9cHwbyi+Kt84rGdz+tLcR0WbmyhazCUL2m8NsrRQYMPO1+x7tWPkByLaYn4OwFEtfKXg nNbpcWu1yUD6lVvFVCKe2VUD3XUmDtUZaLGGaVTMrALk92yi0/G8o1a73Af7NbyQTP47 Og6A== X-Gm-Message-State: ALoCoQlL9hqz8dIpGMq4Os6kaMKF641ggQuexGqe2oQp6o6c3fLgN9nqrXYZw0FfXPwqq4TL/ibj X-Received: by 10.182.89.136 with SMTP id bo8mr2317412obb.7.1418189141655; Tue, 09 Dec 2014 21:25:41 -0800 (PST) Received: from corpmail-nozzle1-1.hot.corp.google.com ([100.108.1.104]) by gmr-mx.google.com with ESMTPS id t24si115977yht.2.2014.12.09.21.25.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 09 Dec 2014 21:25:41 -0800 (PST) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-1.hot.corp.google.com with ESMTP id tigZya7t.3; Tue, 09 Dec 2014 21:25:41 -0800 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 17241220EA8; Tue, 9 Dec 2014 22:25:41 -0700 (MST) From: Simon Glass To: U-Boot Mailing List Date: Tue, 9 Dec 2014 22:25:26 -0700 Message-Id: <1418189127-27407-23-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.2.0.rc0.207.ga3a616c In-Reply-To: <1418189127-27407-1-git-send-email-sjg@chromium.org> References: <1418189127-27407-1-git-send-email-sjg@chromium.org> Cc: Thierry Reding Subject: [U-Boot] [PATCH v4 22/23] net: rtl8169: Use non-cached memory if available X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Thierry Reding To work around potential issues with explicit cache maintenance of the RX and TX descriptor rings, allocate them from a pool of uncached memory if the architecture supports it. Signed-off-by: Thierry Reding Signed-off-by: Simon Glass --- Changes in v4: - Insert missing word 'to' in a comment Changes in v3: - Remove cache-line size warning if dcache is disabled drivers/net/rtl8169.c | 71 +++++++++++++++++++++++++++++++++++++++++++-------- 1 file changed, 60 insertions(+), 11 deletions(-) diff --git a/drivers/net/rtl8169.c b/drivers/net/rtl8169.c index fc8c31e..c1eb9f3 100644 --- a/drivers/net/rtl8169.c +++ b/drivers/net/rtl8169.c @@ -41,6 +41,7 @@ * Modified to use le32_to_cpu and cpu_to_le32 properly */ #include +#include #include #include #include @@ -290,16 +291,15 @@ struct RxDesc { * cases the driver will likely fail because the CPU needs to flush the cache * when requeuing RX buffers, therefore descriptors written by the hardware * may be discarded. + * + * This can be fixed by defining CONFIG_SYS_NONCACHED_MEMORY which will cause + * the driver to allocate descriptors from a pool of non-cached memory. */ #if RTL8169_DESC_SIZE < ARCH_DMA_MINALIGN +#if !defined(CONFIG_SYS_NONCACHED_MEMORY) && !defined(CONFIG_SYS_DCACHE_OFF) #warning cache-line size is larger than descriptor size #endif - -/* Define the TX Descriptor */ -DEFINE_ALIGN_BUFFER(struct TxDesc, tx_ring, NUM_TX_DESC, RTL8169_ALIGN); - -/* Define the RX Descriptor */ -DEFINE_ALIGN_BUFFER(struct RxDesc, rx_ring, NUM_RX_DESC, RTL8169_ALIGN); +#endif /* * Create a static buffer of size RX_BUF_SZ for each TX Descriptor. All @@ -418,34 +418,71 @@ match: } /* + * TX and RX descriptors are 16 bytes. This causes problems with the cache + * maintenance on CPUs where the cache-line size exceeds the size of these + * descriptors. What will happen is that when the driver receives a packet + * it will be immediately requeued for the hardware to reuse. The CPU will + * therefore need to flush the cache-line containing the descriptor, which + * will cause all other descriptors in the same cache-line to be flushed + * along with it. If one of those descriptors had been written to by the + * device those changes (and the associated packet) will be lost. + * + * To work around this, we make use of non-cached memory if available. If + * descriptors are mapped uncached there's no need to manually flush them + * or invalidate them. + * + * Note that this only applies to descriptors. The packet data buffers do + * not have the same constraints since they are 1536 bytes large, so they + * are unlikely to share cache-lines. + */ +static void *rtl_alloc_descs(unsigned int num) +{ + size_t size = num * RTL8169_DESC_SIZE; + +#ifdef CONFIG_SYS_NONCACHED_MEMORY + return (void *)noncached_alloc(size, RTL8169_ALIGN); +#else + return memalign(RTL8169_ALIGN, size); +#endif +} + +/* * Cache maintenance functions. These are simple wrappers around the more * general purpose flush_cache() and invalidate_dcache_range() functions. */ static void rtl_inval_rx_desc(struct RxDesc *desc) { +#ifndef CONFIG_SYS_NONCACHED_MEMORY unsigned long start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1); unsigned long end = ALIGN(start + sizeof(*desc), ARCH_DMA_MINALIGN); invalidate_dcache_range(start, end); +#endif } static void rtl_flush_rx_desc(struct RxDesc *desc) { +#ifndef CONFIG_SYS_NONCACHED_MEMORY flush_cache((unsigned long)desc, sizeof(*desc)); +#endif } static void rtl_inval_tx_desc(struct TxDesc *desc) { +#ifndef CONFIG_SYS_NONCACHED_MEMORY unsigned long start = (unsigned long)desc & ~(ARCH_DMA_MINALIGN - 1); unsigned long end = ALIGN(start + sizeof(*desc), ARCH_DMA_MINALIGN); invalidate_dcache_range(start, end); +#endif } static void rtl_flush_tx_desc(struct TxDesc *desc) { +#ifndef CONFIG_SYS_NONCACHED_MEMORY flush_cache((unsigned long)desc, sizeof(*desc)); +#endif } static void rtl_inval_buffer(void *buf, size_t size) @@ -912,10 +949,16 @@ static int rtl_init(struct eth_device *dev, bd_t *bis) #endif } - tpc->TxDescArray = tx_ring; - tpc->RxDescArray = rx_ring; - return 1; + tpc->RxDescArray = rtl_alloc_descs(NUM_RX_DESC); + if (!tpc->RxDescArray) + return -ENOMEM; + + tpc->TxDescArray = rtl_alloc_descs(NUM_TX_DESC); + if (!tpc->TxDescArray) + return -ENOMEM; + + return 0; } int rtl8169_initialize(bd_t *bis) @@ -929,6 +972,7 @@ int rtl8169_initialize(bd_t *bis) while(1){ unsigned int region; u16 device; + int err; /* Find RTL8169 */ if ((devno = pci_find_devices(supported, idx++)) < 0) @@ -967,9 +1011,14 @@ int rtl8169_initialize(bd_t *bis) dev->send = rtl_send; dev->recv = rtl_recv; - eth_register (dev); + err = rtl_init(dev, bis); + if (err < 0) { + printf(pr_fmt("failed to initialize card: %d\n"), err); + free(dev); + continue; + } - rtl_init(dev, bis); + eth_register (dev); card_number++; }