From patchwork Tue Dec 9 19:40:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steve Rae X-Patchwork-Id: 419236 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1953F1400B7 for ; Wed, 10 Dec 2014 06:40:44 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 608DD4B61A; Tue, 9 Dec 2014 20:40:42 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id eL2qScs0OxPG; Tue, 9 Dec 2014 20:40:42 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E57CB4B61C; Tue, 9 Dec 2014 20:40:41 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2648A4B61C for ; Tue, 9 Dec 2014 20:40:36 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OzScJ7TBsKBX for ; Tue, 9 Dec 2014 20:40:36 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-gw3-out.broadcom.com (mail-gw3-out.broadcom.com [216.31.210.64]) by theia.denx.de (Postfix) with ESMTP id 52F404B61A for ; Tue, 9 Dec 2014 20:40:31 +0100 (CET) X-IronPort-AV: E=Sophos;i="5.07,547,1413270000"; d="scan'208";a="52491888" Received: from irvexchcas07.broadcom.com (HELO IRVEXCHCAS07.corp.ad.broadcom.com) ([10.9.208.55]) by mail-gw3-out.broadcom.com with ESMTP; 09 Dec 2014 11:50:35 -0800 Received: from IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) by IRVEXCHCAS07.corp.ad.broadcom.com (10.9.208.55) with Microsoft SMTP Server (TLS) id 14.3.174.1; Tue, 9 Dec 2014 11:40:21 -0800 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) with Microsoft SMTP Server id 14.3.174.1; Tue, 9 Dec 2014 11:40:19 -0800 Received: from mail.broadcom.com (lbrmn-vmlnx03.ric.broadcom.com [10.136.4.105]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 59AB941017; Tue, 9 Dec 2014 11:39:36 -0800 (PST) From: Steve Rae To: Date: Tue, 9 Dec 2014 11:40:11 -0800 Message-ID: <1418154011-13807-1-git-send-email-srae@broadcom.com> X-Mailer: git-send-email 1.8.5 MIME-Version: 1.0 Cc: Tom Rini , Steve Rae Subject: [U-Boot] [PATCH v3] bcm281xx: add support for "USB OTG clock" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de enable this clock with the following: clk_usb_otg_enable((void *)HSOTG_BASE_ADDR) Signed-off-by: Steve Rae Reviewed-by: Felipe Balbi --- Changes in v3: clean up return statement as per Michael Trimarchi Changes in v2: removed unrelated changes as per Felipe Balbi arch/arm/cpu/armv7/bcm281xx/Makefile | 1 + arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c | 16 ++++++++++++++++ arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c | 27 +++++++++++++++++++++++++++ arch/arm/cpu/armv7/kona-common/clk-stubs.c | 5 +++++ arch/arm/include/asm/arch-bcm281xx/sysmap.h | 2 ++ arch/arm/include/asm/kona-common/clk.h | 1 + 6 files changed, 52 insertions(+) create mode 100644 arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c diff --git a/arch/arm/cpu/armv7/bcm281xx/Makefile b/arch/arm/cpu/armv7/bcm281xx/Makefile index bd867a2..f24aeb3 100644 --- a/arch/arm/cpu/armv7/bcm281xx/Makefile +++ b/arch/arm/cpu/armv7/bcm281xx/Makefile @@ -10,3 +10,4 @@ obj-y += clk-bcm281xx.o obj-y += clk-sdio.o obj-y += clk-bsc.o obj-$(CONFIG_BCM_SF2_ETH) += clk-eth.o +obj-y += clk-usb-otg.o diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c index d16b99f..7e25255 100644 --- a/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c +++ b/arch/arm/cpu/armv7/bcm281xx/clk-bcm281xx.c @@ -209,6 +209,10 @@ static struct peri_clk_data sdio4_sleep_data = { .gate = SW_ONLY_GATE(0x0360, 20, 4), }; +static struct bus_clk_data usb_otg_ahb_data = { + .gate = HW_SW_GATE_AUTO(0x0348, 16, 0, 1), +}; + static struct bus_clk_data sdio1_ahb_data = { .gate = HW_SW_GATE_AUTO(0x0358, 16, 0, 1), }; @@ -331,6 +335,17 @@ static struct ccu_clock esub_ccu_clk = { */ /* KPM bus clocks */ +static struct bus_clock usb_otg_ahb_clk = { + .clk = { + .name = "usb_otg_ahb_clk", + .parent = &kpm_ccu_clk.clk, + .ops = &bus_clk_ops, + .ccu_clk_mgr_base = KONA_MST_CLK_BASE_ADDR, + }, + .freq_tbl = master_ahb_freq_tbl, + .data = &usb_otg_ahb_data, +}; + static struct bus_clock sdio1_ahb_clk = { .clk = { .name = "sdio1_ahb_clk", @@ -541,6 +556,7 @@ struct clk_lookup arch_clk_tbl[] = { CLK_LK(bsc2), CLK_LK(bsc3), /* Bus clocks */ + CLK_LK(usb_otg_ahb), CLK_LK(sdio1_ahb), CLK_LK(sdio2_ahb), CLK_LK(sdio3_ahb), diff --git a/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c new file mode 100644 index 0000000..1d7c5af --- /dev/null +++ b/arch/arm/cpu/armv7/bcm281xx/clk-usb-otg.c @@ -0,0 +1,27 @@ +/* + * Copyright 2014 Broadcom Corporation. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include "clk-core.h" + +/* Enable appropriate clocks for the USB OTG port */ +int clk_usb_otg_enable(void *base) +{ + char *ahbstr; + + switch ((u32) base) { + case HSOTG_BASE_ADDR: + ahbstr = "usb_otg_ahb_clk"; + break; + default: + printf("%s: base 0x%p not found\n", __func__, base); + return -EINVAL; + } + + return clk_get_and_enable(ahbstr); +} diff --git a/arch/arm/cpu/armv7/kona-common/clk-stubs.c b/arch/arm/cpu/armv7/kona-common/clk-stubs.c index 338e0e4..fa10802 100644 --- a/arch/arm/cpu/armv7/kona-common/clk-stubs.c +++ b/arch/arm/cpu/armv7/kona-common/clk-stubs.c @@ -19,3 +19,8 @@ int __weak clk_bsc_enable(void *base, u32 rate, u32 *actual_ratep) { return 0; } + +int __weak clk_usb_otg_enable(void *base) +{ + return 0; +} diff --git a/arch/arm/include/asm/arch-bcm281xx/sysmap.h b/arch/arm/include/asm/arch-bcm281xx/sysmap.h index 350e7f6..93ebf34 100644 --- a/arch/arm/include/asm/arch-bcm281xx/sysmap.h +++ b/arch/arm/include/asm/arch-bcm281xx/sysmap.h @@ -13,6 +13,8 @@ #define ESUB_CLK_BASE_ADDR 0x38000000 #define ESW_CONTRL_BASE_ADDR 0x38200000 #define GPIO2_BASE_ADDR 0x35003000 +#define HSOTG_BASE_ADDR 0x3f120000 +#define HSOTG_CTRL_BASE_ADDR 0x3f130000 #define KONA_MST_CLK_BASE_ADDR 0x3f001000 #define KONA_SLV_CLK_BASE_ADDR 0x3e011000 #define PMU_BSC_BASE_ADDR 0x3500d000 diff --git a/arch/arm/include/asm/kona-common/clk.h b/arch/arm/include/asm/kona-common/clk.h index 2c7e829..a5e2fd9 100644 --- a/arch/arm/include/asm/kona-common/clk.h +++ b/arch/arm/include/asm/kona-common/clk.h @@ -25,5 +25,6 @@ int clk_set_parent(struct clk *clk, struct clk *parent); struct clk *clk_get_parent(struct clk *clk); int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep); int clk_bsc_enable(void *base); +int clk_usb_otg_enable(void *base); #endif