From patchwork Wed Nov 26 18:00:50 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dinh Nguyen X-Patchwork-Id: 415222 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 72978140192 for ; Thu, 27 Nov 2014 05:05:32 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3FACF4B6DA; Wed, 26 Nov 2014 19:05:27 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XOrTzWikpvqA; Wed, 26 Nov 2014 19:05:27 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 34F174B69C; Wed, 26 Nov 2014 19:05:22 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 674BB4B682 for ; Wed, 26 Nov 2014 19:05:16 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id IEksbGUVSA9x for ; Wed, 26 Nov 2014 19:05:16 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1on0074.outbound.protection.outlook.com [157.56.110.74]) by theia.denx.de (Postfix) with ESMTPS id 1B1764B681 for ; Wed, 26 Nov 2014 19:05:14 +0100 (CET) Received: from linux-builds1.altera.com (64.129.157.38) by BN3PR0301MB1186.namprd03.prod.outlook.com (25.160.156.148) with Microsoft SMTP Server (TLS) id 15.1.26.15; Wed, 26 Nov 2014 18:05:08 +0000 From: To: Date: Wed, 26 Nov 2014 12:00:50 -0600 Message-ID: <1417024850-32000-2-git-send-email-dinguyen@opensource.altera.com> X-Mailer: git-send-email 2.0.3 In-Reply-To: <1417024850-32000-1-git-send-email-dinguyen@opensource.altera.com> References: <1417024850-32000-1-git-send-email-dinguyen@opensource.altera.com> MIME-Version: 1.0 X-Originating-IP: [64.129.157.38] X-ClientProxiedBy: BN1PR02CA0020.namprd02.prod.outlook.com (10.141.56.20) To BN3PR0301MB1186.namprd03.prod.outlook.com (25.160.156.148) X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BN3PR0301MB1186; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:; SRVR:BN3PR0301MB1186; X-Forefront-PRVS: 04073E895A X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009020)(6009001)(189002)(199003)(93916002)(104166001)(86362001)(229853001)(50226001)(21056001)(97736003)(107046002)(2351001)(19580395003)(50466002)(19580405001)(31966008)(48376002)(53416004)(69596002)(42186005)(4396001)(89996001)(110136001)(46102003)(33646002)(95666004)(101416001)(87286001)(92566001)(92726001)(102836001)(76176999)(50986999)(105586002)(106356001)(81156004)(66066001)(88136002)(64706001)(86152002)(20776003)(47776003)(87976001)(77156002)(62966003)(77096003)(120916001)(122386002)(40100003)(99396003); DIR:OUT; SFP:1101; SCL:1; SRVR:BN3PR0301MB1186; H:linux-builds1.altera.com; FPR:; SPF:None; MLV:sfv; PTR:InfoNoRecords; MX:1; A:0; LANG:en; X-Exchange-Antispam-Report-CFA-Test: BCL:0; PCL:0; RULEID:; SRVR:BN3PR0301MB1186; X-OriginatorOrg: opensource.altera.com Cc: Marek Vasut , dinh.linux@gmail.com, Pavel Machek , Chin Liang See Subject: [U-Boot] [PATCH 2/2] socfpga: correctly increment freeze_controller_base address X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Dinh Nguyen Correctly increment the base address of the freeze controller. And since SYSMGR_FRZCTRL_VIOCTRL_SHIFT is not needed, remove it from the include file. Signed-off-by: Dinh Nguyen Cc: Vince Bridgers Cc: Chin Liang See Cc: Marek Vasut Cc: Pavel Machek Cc: Wolfgang Denk --- arch/arm/cpu/armv7/socfpga/freeze_controller.c | 6 ++---- arch/arm/include/asm/arch-socfpga/freeze_controller.h | 1 - 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv7/socfpga/freeze_controller.c b/arch/arm/cpu/armv7/socfpga/freeze_controller.c index b8c9bce..0be643c 100644 --- a/arch/arm/cpu/armv7/socfpga/freeze_controller.c +++ b/arch/arm/cpu/armv7/socfpga/freeze_controller.c @@ -38,8 +38,7 @@ void sys_mgr_frzctrl_freeze_req(void) /* Freeze channel 0 to 2 */ for (channel_id = 0; channel_id <= 2; channel_id++) { ioctrl_reg_offset = (u32)( - &freeze_controller_base->vioctrl + - (channel_id << SYSMGR_FRZCTRL_VIOCTRL_SHIFT)); + &freeze_controller_base->vioctrl + channel_id); /* * Assert active low enrnsl, plniotri @@ -120,8 +119,7 @@ void sys_mgr_frzctrl_thaw_req(void) /* Thaw channel 0 to 2 */ for (channel_id = 0; channel_id <= 2; channel_id++) { ioctrl_reg_offset - = (u32)(&freeze_controller_base->vioctrl - + (channel_id << SYSMGR_FRZCTRL_VIOCTRL_SHIFT)); + = (u32)(&freeze_controller_base->vioctrl + channel_id); /* * Assert active low bhniotri signal and diff --git a/arch/arm/include/asm/arch-socfpga/freeze_controller.h b/arch/arm/include/asm/arch-socfpga/freeze_controller.h index 120f20e..f19ad87 100644 --- a/arch/arm/include/asm/arch-socfpga/freeze_controller.h +++ b/arch/arm/include/asm/arch-socfpga/freeze_controller.h @@ -42,7 +42,6 @@ typedef enum { #define SYSMGR_FRZCTRL_HWCTRL_VIO1REQ_MASK 0x00000001 #define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_FROZEN 0x2 #define SYSMGR_FRZCTRL_HWCTRL_VIO1STATE_ENUM_THAWED 0x1 -#define SYSMGR_FRZCTRL_VIOCTRL_SHIFT 0x2 void sys_mgr_frzctrl_freeze_req(void); void sys_mgr_frzctrl_thaw_req(void);