From patchwork Fri Nov 21 03:17:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tang yuantian X-Patchwork-Id: 412944 X-Patchwork-Delegate: yorksun@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 2FF0C14017D for ; Fri, 21 Nov 2014 14:19:09 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D88184B659; Fri, 21 Nov 2014 04:18:59 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ghStsxUylNj1; Fri, 21 Nov 2014 04:18:59 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C430E4B844; Fri, 21 Nov 2014 04:18:57 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2165E4B5F1 for ; Fri, 21 Nov 2014 04:18:48 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XKGzLR5OjxOc for ; Fri, 21 Nov 2014 04:18:48 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-bl2-obe.outbound.protection.outlook.com (mail-bl2on0112.outbound.protection.outlook.com [65.55.169.112]) by theia.denx.de (Postfix) with ESMTPS id B43A64B5EC for ; Fri, 21 Nov 2014 04:18:42 +0100 (CET) Received: from BY2PR03CA009.namprd03.prod.outlook.com (10.255.93.26) by BLUPR03MB151.namprd03.prod.outlook.com (10.255.212.25) with Microsoft SMTP Server (TLS) id 15.1.16.15; Fri, 21 Nov 2014 03:18:38 +0000 Received: from BY2FFO11FD043.protection.gbl (10.255.93.4) by BY2PR03CA009.outlook.office365.com (10.255.93.26) with Microsoft SMTP Server (TLS) id 15.1.26.15 via Frontend Transport; Fri, 21 Nov 2014 03:18:37 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BY2FFO11FD043.mail.protection.outlook.com (10.1.14.228) with Microsoft SMTP Server (TLS) id 15.1.6.13 via Frontend Transport; Fri, 21 Nov 2014 03:18:37 +0000 Received: from titan.ap.freescale.net ([10.192.208.233]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id sAL3ITkk029335; Thu, 20 Nov 2014 20:18:35 -0700 From: To: Date: Fri, 21 Nov 2014 11:17:16 +0800 Message-ID: <1416539836-46933-2-git-send-email-Yuantian.Tang@freescale.com> X-Mailer: git-send-email 2.1.0.27.g96db324 In-Reply-To: <1416539836-46933-1-git-send-email-Yuantian.Tang@freescale.com> References: <1416539836-46933-1-git-send-email-Yuantian.Tang@freescale.com> X-EOPAttributedMessage: 0 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Yuantian.Tang@freescale.com; X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(189002)(199003)(104016003)(31966008)(48376002)(110136001)(93916002)(86362001)(85426001)(50466002)(99396003)(2351001)(36756003)(107046002)(77156002)(95666004)(106466001)(62966003)(105606002)(229853001)(120916001)(87286001)(64706001)(19580405001)(47776003)(19580395003)(20776003)(21056001)(50986999)(76176999)(97736003)(44976005)(89996001)(84676001)(92726001)(92566001)(86152002)(46102003)(68736004)(102836001)(87936001)(6806004)(4396001)(50226001)(104166001)(88136002)(19627235001); DIR:OUT; SFP:1102; SCL:1; SRVR:BLUPR03MB151; H:tx30smr01.am.freescale.net; FPR:; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB151; X-Exchange-Antispam-Report-Test: UriScan:; X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB151; X-Forefront-PRVS: 0402872DA1 X-Exchange-Antispam-Report-CFA-Test: BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB151; X-OriginatorOrg: freescale.com Cc: r64188@freescale.com, u-boot@lists.denx.de, trini@ti.com Subject: [U-Boot] [PATCH] mpc85xx/t104xrdb: convert deep sleep to generic board interface X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Tang Yuantian A new interface is introduced to support generic board structure. Converts it to use new interface. Signed-off-by: Tang Yuantian --- board/freescale/t104xrdb/ddr.c | 19 +++++++++++++++++++ board/freescale/t104xrdb/spl.c | 19 +++---------------- board/freescale/t104xrdb/t104xrdb.c | 24 +++++++++++------------- include/configs/T104xRDB.h | 3 +++ 4 files changed, 36 insertions(+), 29 deletions(-) diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c index 2c331ee..5aa11b1 100644 --- a/board/freescale/t104xrdb/ddr.c +++ b/board/freescale/t104xrdb/ddr.c @@ -11,6 +11,7 @@ #include #include #include +#include #include "ddr.h" DECLARE_GLOBAL_DATA_PTR; @@ -109,6 +110,19 @@ found: popts->ddr_cdr2 = DDR_CDR2_ODT(DDR_CDR_ODT_75ohm); } +#if defined(CONFIG_DEEP_SLEEP) +void board_mem_sleep_setup(void) +{ + void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE; + + /* does not provide HW signals for power management */ + clrbits_8(cpld_base + 0x17, 0x40); + /* Disable MCKE isolation */ + gpio_set_value(2, 0); + udelay(1); +} +#endif + phys_size_t initdram(int board_type) { phys_size_t dram_size; @@ -124,5 +138,10 @@ phys_size_t initdram(int board_type) #else dram_size = fsl_ddr_sdram_size(); #endif + +#if defined(CONFIG_DEEP_SLEEP) && !defined(CONFIG_SPL_BUILD) + fsl_dp_resume(); +#endif + return dram_size; } diff --git a/board/freescale/t104xrdb/spl.c b/board/freescale/t104xrdb/spl.c index 3822a37..b248f3b 100644 --- a/board/freescale/t104xrdb/spl.c +++ b/board/freescale/t104xrdb/spl.c @@ -11,7 +11,7 @@ #include #include #include -#include +#include "../common/sleep.h" DECLARE_GLOBAL_DATA_PTR; @@ -58,8 +58,8 @@ void board_init_f(ulong bootflag) #ifdef CONFIG_DEEP_SLEEP /* disable the console if boot from deep sleep */ - if (in_be32(&gur->scrtsr[0]) & (1 << 3)) - gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE; + if (is_warm_boot()) + fsl_dp_disable_console(); #endif /* compiler optimization barrier needed for GCC >= 3.4 */ __asm__ __volatile__("" : : : "memory"); @@ -126,16 +126,3 @@ void board_init_r(gd_t *gd, ulong dest_addr) nand_boot(); #endif } - -#ifdef CONFIG_DEEP_SLEEP -void board_mem_sleep_setup(void) -{ - void __iomem *cpld_base = (void *)CONFIG_SYS_CPLD_BASE; - - /* does not provide HW signals for power management */ - clrbits_8(cpld_base + 0x17, 0x40); - /* Disable MCKE isolation */ - gpio_set_value(2, 0); - udelay(1); -} -#endif diff --git a/board/freescale/t104xrdb/t104xrdb.c b/board/freescale/t104xrdb/t104xrdb.c index ddb669f..abca297 100644 --- a/board/freescale/t104xrdb/t104xrdb.c +++ b/board/freescale/t104xrdb/t104xrdb.c @@ -17,8 +17,7 @@ #include #include #include -#include - +#include "../common/sleep.h" #include "t104xrdb.h" #include "cpld.h" @@ -44,6 +43,16 @@ int checkboard(void) return 0; } +int board_early_init_f(void) +{ +#if defined(CONFIG_DEEP_SLEEP) + if (is_warm_boot()) + fsl_dp_disable_console(); +#endif + + return 0; +} + int board_early_init_r(void) { #ifdef CONFIG_SYS_FLASH_BASE @@ -111,14 +120,3 @@ void ft_board_setup(void *blob, bd_t *bd) fdt_fixup_fman_ethernet(blob); #endif } - -#ifdef CONFIG_DEEP_SLEEP -void board_mem_sleep_setup(void) -{ - /* does not provide HW signals for power management */ - CPLD_WRITE(misc_ctl_status, (CPLD_READ(misc_ctl_status) & ~0x40)); - /* Disable MCKE isolation */ - gpio_set_value(2, 0); - udelay(1); -} -#endif diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index 2bb86e4..36ac66d 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -100,7 +100,10 @@ /* support deep sleep */ #define CONFIG_DEEP_SLEEP +#if defined(CONFIG_DEEP_SLEEP) +#define CONFIG_BOARD_EARLY_INIT_F #define CONFIG_SILENT_CONSOLE +#endif #ifndef CONFIG_SYS_TEXT_BASE #define CONFIG_SYS_TEXT_BASE 0xeff40000