From patchwork Fri Oct 31 12:08:02 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hyungwon Hwang X-Patchwork-Id: 405292 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0125C140076 for ; Fri, 31 Oct 2014 23:08:49 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3D7014BD75; Fri, 31 Oct 2014 13:08:43 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id yYtjlR1ejSCc; Fri, 31 Oct 2014 13:08:42 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3896B4BD5E; Fri, 31 Oct 2014 13:08:30 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3BB984BD25 for ; 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Fri, 31 Oct 2014 21:08:07 +0900 (KST) Received: from localhost.localdomain ([10.88.98.185]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0NEB00JY75PHLM70@mmp1.samsung.com>; Fri, 31 Oct 2014 21:08:07 +0900 (KST) From: Hyungwon Hwang To: mk7.kang@samsung.com, l.majewski@samsung.com, u-boot@lists.denx.de Date: Fri, 31 Oct 2014 21:08:02 +0900 Message-id: <1414757284-32067-3-git-send-email-human.hwang@samsung.com> X-Mailer: git-send-email 1.8.3.2 In-reply-to: <1414757284-32067-1-git-send-email-human.hwang@samsung.com> References: <1414757284-32067-1-git-send-email-human.hwang@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrPLMWRmVeSWpSXmKPExsWyRsSkWHd5dXCIwbx1+hZLZ/SxWrx5uJnR ouNIC6PF272d7A4sHmfv7GD06NuyijGAKYrLJiU1J7MstUjfLoEr4/3FiUwFP2UqDn1Yw9LA eF6ii5GTQ0LARKJnxxs2CFtM4sK99UA2F4eQwFJGiQW/FzLCFJ2YeYIZIrGIUeLlwn+sEE4r k8TOQ33MIFVsAnoSC679YAexRQTcJKZvmwHWzSygI3H95hawGmEBa4ne1s9gNSwCqhJXbi4A W80r4C5x8dwSdohtChLLvqwFq+cU8JDYdmMyWI0QUM2cdwfAzpMQeM0m0fp0KxPEIAGJb5MP sXQxcgAlZCU2HWCGmCMpcXDFDZYJjMILGBlWMYqmFiQXFCelFxnrFSfmFpfmpesl5+duYgSG 6+l/z/p3MN49YH2IUYCDUYmHd8HxoBAh1sSy4srcQ4ymQBsmMkuJJucDoyKvJN7Q2MzIwtTE 1NjI3NJMSZx3odTPYCGB9MSS1OzU1ILUovii0pzU4kOMTBycUg2MxxzOyQds2ZrTt3bG36zO V9fk/PZ/Nbl/5ttijdP199b6cbZnSk6eK+W7e7NcdMnUk6Vvm547zp/ztfT2i1naEzvm86qy fbB+erxW3Yvf8XM3r9ErM2NJy2Vbp/jN093E93pWc23Dj3NcsUdWBXS3hXonal79+m/xeeX8 3m8a4SvuP1y8a8vpOiWW4oxEQy3mouJEABUEUI5SAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupkkeLIzCtJLcpLzFFi42I5/e+xgO7y6uAQg0U7NCyWzuhjtXjzcDOj RceRFkaLt3s72R1YPM7e2cHo0bdlFWMAU1QDo01GamJKapFCal5yfkpmXrqtkndwvHO8qZmB oa6hpYW5kkJeYm6qrZKLT4CuW2YO0ColhbLEnFKgUEBicbGSvh2mCaEhbroWMI0Rur4hQXA9 RgZoIGENY8b7ixOZCn7KVBz6sIalgfG8RBcjJ4eEgInEiZknmCFsMYkL99azdTFycQgJLGKU eLnwHyuE08oksfNQH1gVm4CexIJrP9hBbBEBN4np22YwgtjMAjoS129uAasRFrCW6G39DFbD IqAqceXmAjYQm1fAXeLiuSXsENsUJJZ9WQtWzyngIbHtxmSwGiGgmjnvDrBNYORdwMiwilE0 tSC5oDgpPddIrzgxt7g0L10vOT93EyM4Gp5J72Bc1WBxiFGAg1GJh3fB8aAQIdbEsuLK3EOM EhzMSiK8EmXBIUK8KYmVValF+fFFpTmpxYcYTYGumsgsJZqcD4zUvJJ4Q2MTMyNLI3NDCyNj cyVx3oOt1oFCAumJJanZqakFqUUwfUwcnFINjI3fblz2s9J2mfrU3Sq2acHiTypdix/uDBa4 Mu2ibLghf33ro7rN+X/5vdZ6N83aOsnRp7O8vY9/hdIaox+/Lz9sPG2y58T+nES3EJb8/NrW 94zy9apnpNbcKtGeKjnLNLLUTGP346Wz9zyZMmup3stzgs0vct+vX+miW340Y9GdZ6xZr1KU eZVYijMSDbWYi4oTAclZVLicAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: Hyungwon Hwang Subject: [U-Boot] [PATCH 2/4] Exynos5800: Add support for Exynos5800 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The gpios of Exynos5800 are different from that of Exynos5420. This patch adds the gpio information and table of Exynos5800. Signed-off-by: Hyungwon Hwang --- arch/arm/include/asm/arch-exynos/gpio.h | 31 +++++++++++++++++++++++++++++-- drivers/gpio/s5p_gpio.c | 4 +++- 2 files changed, 32 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/gpio.h b/arch/arm/include/asm/arch-exynos/gpio.h index 431ae3a..8f82ef0 100644 --- a/arch/arm/include/asm/arch-exynos/gpio.h +++ b/arch/arm/include/asm/arch-exynos/gpio.h @@ -1368,11 +1368,21 @@ static struct gpio_info exynos5420_gpio_data[EXYNOS5420_GPIO_NUM_PARTS] = { { EXYNOS5420_GPIO_PART5_BASE, EXYNOS5420_GPIO_MAX_PORT }, }; +#define EXYNOS5800_GPIO_NUM_PARTS 4 +static struct gpio_info exynos5800_gpio_data[EXYNOS5800_GPIO_NUM_PARTS] = { + { EXYNOS5420_GPIO_PART1_BASE, EXYNOS5420_GPIO_MAX_PORT_PART_1 }, + { EXYNOS5420_GPIO_PART2_BASE, EXYNOS5420_GPIO_MAX_PORT_PART_2 }, + { EXYNOS5420_GPIO_PART3_BASE, EXYNOS5420_GPIO_MAX_PORT_PART_3 }, + { EXYNOS5420_GPIO_PART4_BASE, EXYNOS5420_GPIO_MAX_PORT_PART_4 }, +}; + static inline struct gpio_info *get_gpio_data(void) { if (cpu_is_exynos5()) { - if (proid_is_exynos5420() || proid_is_exynos5800()) + if (proid_is_exynos5420()) return exynos5420_gpio_data; + else if (proid_is_exynos5800()) + return exynos5800_gpio_data; else return exynos5_gpio_data; } else if (cpu_is_exynos4()) { @@ -1388,8 +1398,10 @@ static inline struct gpio_info *get_gpio_data(void) static inline unsigned int get_bank_num(void) { if (cpu_is_exynos5()) { - if (proid_is_exynos5420() || proid_is_exynos5800()) + if (proid_is_exynos5420()) return EXYNOS5420_GPIO_NUM_PARTS; + if (proid_is_exynos5800()) + return EXYNOS5800_GPIO_NUM_PARTS; else return EXYNOS5_GPIO_NUM_PARTS; } else if (cpu_is_exynos4()) { @@ -1493,6 +1505,21 @@ static const struct gpio_name_num_table exynos5420_gpio_table[] = { { 0 } }; +static const struct gpio_name_num_table exynos5800_gpio_table[] = { + GPIO_ENTRY('x', EXYNOS5420_GPIO_X00, EXYNOS5420_GPIO_C00, 0), + GPIO_ENTRY('c', EXYNOS5420_GPIO_C00, EXYNOS5420_GPIO_D10, 0), + GPIO_ENTRY('d', EXYNOS5420_GPIO_D10, EXYNOS5420_GPIO_Y00, 0), + GPIO_ENTRY('y', EXYNOS5420_GPIO_Y00, EXYNOS5420_GPIO_E00, 0), + GPIO_ENTRY('e', EXYNOS5420_GPIO_E00, EXYNOS5420_GPIO_F00, 0), + GPIO_ENTRY('f', EXYNOS5420_GPIO_F00, EXYNOS5420_GPIO_G00, 0), + GPIO_ENTRY('g', EXYNOS5420_GPIO_G00, EXYNOS5420_GPIO_J40, 0), + GPIO_ENTRY('j', EXYNOS5420_GPIO_J40, EXYNOS5420_GPIO_A00, 0), + GPIO_ENTRY('a', EXYNOS5420_GPIO_A00, EXYNOS5420_GPIO_B00, 0), + GPIO_ENTRY('b', EXYNOS5420_GPIO_B00, EXYNOS5420_GPIO_H00, 0), + GPIO_ENTRY('h', EXYNOS5420_GPIO_H00, EXYNOS5420_GPIO_Z0, 0), + { 0 } +}; + void gpio_cfg_pin(int gpio, int cfg); void gpio_set_pull(int gpio, int mode); void gpio_set_drv(int gpio, int mode); diff --git a/drivers/gpio/s5p_gpio.c b/drivers/gpio/s5p_gpio.c index bcf44eb..bed7cd7 100644 --- a/drivers/gpio/s5p_gpio.c +++ b/drivers/gpio/s5p_gpio.c @@ -57,11 +57,13 @@ static inline int s5p_name_to_gpio(const char *name) */ #if defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) if (cpu_is_exynos5()) { - if (proid_is_exynos5420() || proid_is_exynos5800()) { + if (proid_is_exynos5420()) { tabp = exynos5420_gpio_table; irregular_bank_name = 'y'; irregular_set_number = '7'; irregular_bank_base = EXYNOS5420_GPIO_Y70; + } else if (proid_is_exynos5800()) { + tabp = exynos5800_gpio_table; } else { tabp = exynos5_gpio_table; irregular_bank_name = 'c';