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[U-Boot,v2,1/2] SPI: mxc_spi: remove second reset from ECSPI config handler

Message ID 1414073379-1287-2-git-send-email-list-09_u-boot@tqsc.de
State Accepted
Delegated to: Jagannadha Sutradharudu Teki
Headers show

Commit Message

Markus Niebel Oct. 23, 2014, 2:09 p.m. UTC 
From: Markus Niebel <Markus.Niebel@tq-group.com>

the second reset prevents other registers to be written.
This will prevent to have the correct signal levels for
SCLK before writing to the config reg in spi_xchg_single.

Tested with GPIO based chipselect and SPI_MODE_3 on i.MX6S

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
---
Changes since v1:
- rebase to current master

 drivers/spi/mxc_spi.c | 3 ---
 1 file changed, 3 deletions(-)
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Patch

diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c
index 026f680..555b34f 100644
--- a/drivers/spi/mxc_spi.c
+++ b/drivers/spi/mxc_spi.c
@@ -168,9 +168,6 @@  static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs,
 	reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_POSTDIV(0x0F)) |
 		MXC_CSPICTRL_POSTDIV(post_div);
 
-	/* We need to disable SPI before changing registers */
-	reg_ctrl &= ~MXC_CSPICTRL_EN;
-
 	if (mode & SPI_CS_HIGH)
 		ss_pol = 1;