From patchwork Thu Oct 23 13:37:16 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bin Meng X-Patchwork-Id: 402501 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 2E0EF140095 for ; Fri, 24 Oct 2014 00:37:35 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6CD08A761C; Thu, 23 Oct 2014 15:37:28 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7w1QoVnrUJ6C; Thu, 23 Oct 2014 15:37:28 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DAD20A760E; Thu, 23 Oct 2014 15:37:27 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7ECA6A760E for ; Thu, 23 Oct 2014 15:37:26 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id czBqbk4HIFVM for ; Thu, 23 Oct 2014 15:37:26 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pd0-f172.google.com (mail-pd0-f172.google.com [209.85.192.172]) by theia.denx.de (Postfix) with ESMTPS id 1ACB5A75F9 for ; Thu, 23 Oct 2014 15:37:23 +0200 (CEST) Received: by mail-pd0-f172.google.com with SMTP id r10so305711pdi.17 for ; Thu, 23 Oct 2014 06:37:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=TW6D4/G5eTUB0Klpk7xh7uCbrE4IEXp8XrLUSxxTWH0=; b=GN11dEZLJnYsVEKTvnTkFDPIUDW8GCAU8zxC9cjiNURrbNrgen4XJPEc0q/3+hj2A9 jMr5hEnOo3JfCpxM55YYNMDTzfAPpM5SJrKTksbUUPx/vQuuRhZ9yIYUfKfW1WPozCiF cldWpRTCigEavVawe8D52mIBuLdGrjmRXhnHNKikHOq8b5mu1zBwx2mlw9MA9Kdu63Zl WVO1rn6iJahYSTyzAhgYXhwSxCs8MmKp/GijQaAK/KaaPQZpDswY2LAi4Dxls2PQ4Rz7 DOPXnYUUHDBCsMWTGpJK62kuwt9O5r8hdEuEm/0oJwzk74TSLXd5WmD5YSmZmebfI8sA Z/Dg== X-Received: by 10.70.36.202 with SMTP id s10mr4869660pdj.101.1414071442017; Thu, 23 Oct 2014 06:37:22 -0700 (PDT) Received: from localhost ([106.120.101.38]) by mx.google.com with ESMTPSA id i10sm1612948pdr.21.2014.10.23.06.37.20 for (version=TLSv1 cipher=RC4-SHA bits=128/128); Thu, 23 Oct 2014 06:37:21 -0700 (PDT) From: Bin Meng To: Jagannadha Sutradharudu Teki , U-Boot Mailing List Date: Thu, 23 Oct 2014 21:37:16 +0800 Message-Id: <1414071436-16402-1-git-send-email-bmeng.cn@gmail.com> X-Mailer: git-send-email 1.8.2.1 Subject: [U-Boot] [PATCH 5/5] sf: Update SST25* flash params of sector size & numbers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Change SST25* flash sector size to 4KiB to match SECT_4K. This makes 'sf erase offset +len' work on real 4KiB boundary instead of 64KiB. Signed-off-by: Bin Meng Acked-by: Simon Glass Tested-by: Simon Glass --- drivers/mtd/spi/sf_params.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/spi/sf_params.c b/drivers/mtd/spi/sf_params.c index d5f3597..dd3baa4 100644 --- a/drivers/mtd/spi/sf_params.c +++ b/drivers/mtd/spi/sf_params.c @@ -88,16 +88,16 @@ const struct spi_flash_params spi_flash_params_table[] = { {"N25Q1024A", 0x20bb21, 0x0, 64 * 1024, 2048, RD_FULL, WR_QPP | E_FSR | SECT_4K}, #endif #ifdef CONFIG_SPI_FLASH_SST /* SST */ - {"SST25VF040B", 0xbf258d, 0x0, 64 * 1024, 8, RD_SLOW, SECT_4K | SST_WP}, - {"SST25VF080B", 0xbf258e, 0x0, 64 * 1024, 16, RD_SLOW, SECT_4K | SST_WP}, - {"SST25VF016B", 0xbf2541, 0x0, 64 * 1024, 32, RD_SLOW, SECT_4K | SST_WP}, - {"SST25VF032B", 0xbf254a, 0x0, 64 * 1024, 64, RD_SLOW, SECT_4K | SST_WP}, - {"SST25VF064C", 0xbf254b, 0x0, 64 * 1024, 128, RD_EXTN, SECT_4K}, - {"SST25WF512", 0xbf2501, 0x0, 64 * 1024, 1, RD_SLOW, SECT_4K | SST_WP}, - {"SST25WF010", 0xbf2502, 0x0, 64 * 1024, 2, RD_SLOW, SECT_4K | SST_WP}, - {"SST25WF020", 0xbf2503, 0x0, 64 * 1024, 4, RD_SLOW, SECT_4K | SST_WP}, - {"SST25WF040", 0xbf2504, 0x0, 64 * 1024, 8, RD_SLOW, SECT_4K | SST_WP}, - {"SST25WF080", 0xbf2505, 0x0, 64 * 1024, 16, RD_SLOW, SECT_4K | SST_WP}, + {"SST25VF040B", 0xbf258d, 0x0, 4 * 1024, 128, RD_SLOW, SECT_4K | SST_WP}, + {"SST25VF080B", 0xbf258e, 0x0, 4 * 1024, 256, RD_SLOW, SECT_4K | SST_WP}, + {"SST25VF016B", 0xbf2541, 0x0, 4 * 1024, 512, RD_SLOW, SECT_4K | SST_WP}, + {"SST25VF032B", 0xbf254a, 0x0, 4 * 1024, 1024, RD_SLOW, SECT_4K | SST_WP}, + {"SST25VF064C", 0xbf254b, 0x0, 4 * 1024, 2048, RD_EXTN, SECT_4K}, + {"SST25WF512", 0xbf2501, 0x0, 4 * 1024, 16, RD_SLOW, SECT_4K | SST_WP}, + {"SST25WF010", 0xbf2502, 0x0, 4 * 1024, 32, RD_SLOW, SECT_4K | SST_WP}, + {"SST25WF020", 0xbf2503, 0x0, 4 * 1024, 64, RD_SLOW, SECT_4K | SST_WP}, + {"SST25WF040", 0xbf2504, 0x0, 4 * 1024, 128, RD_SLOW, SECT_4K | SST_WP}, + {"SST25WF080", 0xbf2505, 0x0, 4 * 1024, 256, RD_SLOW, SECT_4K | SST_WP}, #endif #ifdef CONFIG_SPI_FLASH_WINBOND /* WINBOND */ {"W25P80", 0xef2014, 0x0, 64 * 1024, 16, 0, 0},