From patchwork Tue Oct 14 23:55:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Khoronzhuk X-Patchwork-Id: 399597 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 739FE14012A for ; Wed, 15 Oct 2014 10:56:09 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7B07EA7491; Wed, 15 Oct 2014 01:56:00 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CdGu05a8CgBz; Wed, 15 Oct 2014 01:56:00 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 08670A7455; Wed, 15 Oct 2014 01:56:00 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8CA35A7489 for ; Wed, 15 Oct 2014 01:55:52 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id i-E6TMIuLDW3 for ; Wed, 15 Oct 2014 01:55:52 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) by theia.denx.de (Postfix) with ESMTPS id 3613BA7452 for ; Wed, 15 Oct 2014 01:55:49 +0200 (CEST) Received: from dflxv15.itg.ti.com ([128.247.5.124]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id s9ENtlNv000485 for ; Tue, 14 Oct 2014 18:55:47 -0500 Received: from DFLE72.ent.ti.com (dfle72.ent.ti.com [128.247.5.109]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id s9ENtl2s004065 for ; Tue, 14 Oct 2014 18:55:47 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE72.ent.ti.com (128.247.5.109) with Microsoft SMTP Server id 14.3.174.1; Tue, 14 Oct 2014 18:55:46 -0500 Received: from khorivan.itg.ti.com (incasgf5a_e1_2.itg.ti.com [10.167.216.36]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id s9ENtbkQ011548; Tue, 14 Oct 2014 18:55:45 -0500 From: Ivan Khoronzhuk To: , Date: Wed, 15 Oct 2014 02:55:29 +0300 Message-ID: <1413330932-30184-4-git-send-email-ivan.khoronzhuk@ti.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1413330932-30184-1-git-send-email-ivan.khoronzhuk@ti.com> References: <1413330932-30184-1-git-send-email-ivan.khoronzhuk@ti.com> MIME-Version: 1.0 Cc: Hao Zhang Subject: [U-Boot] [U-boot] [Patch v4 3/6] keystone2: msmc: add MSMC cache coherency support for K2L SOC X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Hao Zhang This patch adds Keystone II Lamar (K2L) SoC specific definitions to support MSMC cache coherency. Acked-by: Vitaly Andrianov Signed-off-by: Hao Zhang Signed-off-by: Ivan Khoronzhuk --- arch/arm/cpu/armv7/keystone/init.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/cpu/armv7/keystone/init.c b/arch/arm/cpu/armv7/keystone/init.c index a8f8aee..a0ecfa2 100644 --- a/arch/arm/cpu/armv7/keystone/init.c +++ b/arch/arm/cpu/armv7/keystone/init.c @@ -32,6 +32,9 @@ int arch_cpu_init(void) #ifdef CONFIG_SOC_K2E msmc_share_all_segments(13); /* PCIE 1 */ #endif +#ifdef CONFIG_SOC_K2L + msmc_share_all_segments(14); /* PCIE 1 */ +#endif /* * just initialise the COM2 port so that TI specific