From patchwork Fri Oct 10 14:21:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 398584 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 82CA21400AB for ; Sat, 11 Oct 2014 01:22:39 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 310A1A7442; Fri, 10 Oct 2014 16:22:38 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id pJBAnwQ3Hh-e; Fri, 10 Oct 2014 16:22:37 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9EA06A73F5; Fri, 10 Oct 2014 16:22:37 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9FDD2A73F5 for ; Fri, 10 Oct 2014 16:22:32 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1UfYVnqKhyHK for ; Fri, 10 Oct 2014 16:22:32 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-yh0-f73.google.com (mail-yh0-f73.google.com [209.85.213.73]) by theia.denx.de (Postfix) with ESMTPS id 4932EA73ED for ; Fri, 10 Oct 2014 16:22:29 +0200 (CEST) Received: by mail-yh0-f73.google.com with SMTP id i57so338058yha.0 for ; Fri, 10 Oct 2014 07:22:28 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DToPSF2L7jPwRywpTCHhcTVWz4AM8CMX4V8ElXDZE0Y=; b=JfHc41fkJ6ZYuuMPMKKD7AFQtvMmo7BFyw5GLBwawOESQYDeCorM50Ax154RTSFwdg yF81KM+TP1dTHtpmOqm/xJNqUbODn15cswO0ipiqQum7FKwcYxYV/fS3xXi20RjtNzf8 38nWcEpPW0dTutL5OkgA01i3gvhZ1VagU73riUugqg+GXfHcWD9qh99SOCYlDqAgMT/W rY6licLN/Qo+sDNvuAPswd4INlnSqb0iSyTBgYF57RDDTrrX3KWUlMv3Hb8qvWWPmDK3 /AxUWuFUapD+vW7bY8ZJfnGNi8EFZ14jbzKLjoGFNkaqHq5zBHg2XXjqdKNzC+taOO9t hxMQ== X-Gm-Message-State: ALoCoQmCGPJn7mjz4Zv1lNLLYrtMR/HAr9m8gKXDHMOqvN+ytEJo1dCXxKdjKGwBioDX1XiwljQB X-Received: by 10.236.72.66 with SMTP id s42mr3486324yhd.9.1412950947946; Fri, 10 Oct 2014 07:22:27 -0700 (PDT) Received: from corpmail-nozzle1-1.hot.corp.google.com ([100.108.1.104]) by gmr-mx.google.com with ESMTPS id k66si326128yho.7.2014.10.10.07.22.27 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Oct 2014 07:22:27 -0700 (PDT) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-1.hot.corp.google.com with ESMTP id yWYW4UVI.1; Fri, 10 Oct 2014 07:22:27 -0700 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 600A52210DB; Fri, 10 Oct 2014 08:22:27 -0600 (MDT) From: Simon Glass To: U-Boot Mailing List Date: Fri, 10 Oct 2014 08:21:52 -0600 Message-Id: <1412950921-20052-2-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1412950921-20052-1-git-send-email-sjg@chromium.org> References: <1412950921-20052-1-git-send-email-sjg@chromium.org> Cc: Graeme Russ Subject: [U-Boot] [PATCH 01/10] x86: Move paging functions into cpu.c X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de These functions really don't belong in physmem as they relate to the cpu. Move them. Signed-off-by: Simon Glass --- arch/x86/cpu/cpu.c | 35 +++++++++++++++++++++++++++++++++++ arch/x86/include/asm/cpu.h | 22 ++++++++++++++++++++++ arch/x86/lib/physmem.c | 33 +++------------------------------ 3 files changed, 60 insertions(+), 30 deletions(-) create mode 100644 arch/x86/include/asm/cpu.h diff --git a/arch/x86/cpu/cpu.c b/arch/x86/cpu/cpu.c index 623e3af..7a4de29 100644 --- a/arch/x86/cpu/cpu.c +++ b/arch/x86/cpu/cpu.c @@ -240,3 +240,38 @@ int icache_status(void) { return 1; } + +void cpu_enable_paging_pae(ulong cr3) +{ + __asm__ __volatile__( + /* Load the page table address */ + "movl %0, %%cr3\n" + /* Enable pae */ + "movl %%cr4, %%eax\n" + "orl $0x00000020, %%eax\n" + "movl %%eax, %%cr4\n" + /* Enable paging */ + "movl %%cr0, %%eax\n" + "orl $0x80000000, %%eax\n" + "movl %%eax, %%cr0\n" + : + : "r" (cr3) + : "eax"); +} + +void cpu_disable_paging_pae(void) +{ + /* Turn off paging */ + __asm__ __volatile__ ( + /* Disable paging */ + "movl %%cr0, %%eax\n" + "andl $0x7fffffff, %%eax\n" + "movl %%eax, %%cr0\n" + /* Disable pae */ + "movl %%cr4, %%eax\n" + "andl $0xffffffdf, %%eax\n" + "movl %%eax, %%cr4\n" + : + : + : "eax"); +} diff --git a/arch/x86/include/asm/cpu.h b/arch/x86/include/asm/cpu.h new file mode 100644 index 0000000..2938087 --- /dev/null +++ b/arch/x86/include/asm/cpu.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2014 The Chromium OS Authors. + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __X86_CPU_H +#define __X86_CPU_H + + /** + * cpu_enable_paging_pae() - Enable PAE-paging + * + * @pdpt: Value to set in cr3 (PDPT or PML4T) + */ +void cpu_enable_paging_pae(ulong cr3); + +/** + * cpu_disable_paging_pae() - Disable paging and PAE + */ +void cpu_disable_paging_pae(void); + +#endif diff --git a/arch/x86/lib/physmem.c b/arch/x86/lib/physmem.c index b57b2c3..c3c709e 100644 --- a/arch/x86/lib/physmem.c +++ b/arch/x86/lib/physmem.c @@ -10,6 +10,7 @@ #include #include +#include #include DECLARE_GLOBAL_DATA_PTR; @@ -112,41 +113,13 @@ static void x86_phys_enter_paging(void) x86_phys_map_page(page_addr, page_addr, 0); } - /* Turn on paging */ - __asm__ __volatile__( - /* Load the page table address */ - "movl %0, %%cr3\n\t" - /* Enable pae */ - "movl %%cr4, %%eax\n\t" - "orl $0x00000020, %%eax\n\t" - "movl %%eax, %%cr4\n\t" - /* Enable paging */ - "movl %%cr0, %%eax\n\t" - "orl $0x80000000, %%eax\n\t" - "movl %%eax, %%cr0\n\t" - : - : "r" (pdpt) - : "eax" - ); + cpu_enable_paging_pae((ulong)pdpt); } /* Disable paging and PAE mode. */ static void x86_phys_exit_paging(void) { - /* Turn off paging */ - __asm__ __volatile__ ( - /* Disable paging */ - "movl %%cr0, %%eax\n\t" - "andl $0x7fffffff, %%eax\n\t" - "movl %%eax, %%cr0\n\t" - /* Disable pae */ - "movl %%cr4, %%eax\n\t" - "andl $0xffffffdf, %%eax\n\t" - "movl %%eax, %%cr4\n\t" - : - : - : "eax" - ); + cpu_disable_paging_pae(); } /*