From patchwork Sat Oct 4 17:29:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 396540 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id BBA3B14017E for ; Sun, 5 Oct 2014 04:31:38 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C1F31A7406; Sat, 4 Oct 2014 19:31:01 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TdrRS+lcGJEH; Sat, 4 Oct 2014 19:31:01 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2B5C4A742C; Sat, 4 Oct 2014 19:30:43 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CEBF34B5FD for ; Sat, 4 Oct 2014 19:30:21 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aa1BWmKGUft0 for ; Sat, 4 Oct 2014 19:30:21 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f73.google.com (mail-pa0-f73.google.com [209.85.220.73]) by theia.denx.de (Postfix) with ESMTPS id 408554B600 for ; Sat, 4 Oct 2014 19:30:17 +0200 (CEST) Received: by mail-pa0-f73.google.com with SMTP id et14so691466pad.2 for ; Sat, 04 Oct 2014 10:30:16 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7TLyWSH4IwDlJcvvrM8GpCyVo5KIzox1vZGEUH/sRXg=; b=LDOqEGxxVuwg78CW+SKFMkEeYN1tiG3PIxCwo6q9Zb6A5mjZaDGf0UUFhc7eWuZ5Yr B78dszgIGdx+BTDLC0sONeziQeXCkD/MOoxqRdxK2nykSkwKpt+QRKKvjfHRxJoL3B7j A9KCiKHB2UNM/IQl7hqn80PRAs4piVSVD0Tr7NDpWUIWLwCY0dcpCSR217eXv0CTXRr4 75LlRQG6ep3gePD1vM3FlxNp0/unMDY6QWhZa7x/XrxifjQ0b02nOtMOEsUcJaYwWVz6 Su5/MOLvslUUwsy66WnuXCBJJvyrwqKe12uXp6jJcRkDktiW3oQsU5HKOHr5vBg4CD8l i41w== X-Gm-Message-State: ALoCoQmrlb/RhXoxLIq8LyeR+FvSC3HUjiRQjQUSSMAhsexlQxYRP8oJfN3XqhJ92vVMVKPf9Z7l X-Received: by 10.66.152.48 with SMTP id uv16mr10032296pab.5.1412443816320; Sat, 04 Oct 2014 10:30:16 -0700 (PDT) Received: from corpmail-nozzle1-1.hot.corp.google.com ([100.108.1.104]) by gmr-mx.google.com with ESMTPS id t28si496999yhb.4.2014.10.04.10.30.15 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 04 Oct 2014 10:30:16 -0700 (PDT) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-1.hot.corp.google.com with ESMTP id 03O5223X.1; Sat, 04 Oct 2014 10:30:16 -0700 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 31792223BBD; Sat, 4 Oct 2014 11:30:15 -0600 (MDT) From: Simon Glass To: U-Boot Mailing List Date: Sat, 4 Oct 2014 11:29:41 -0600 Message-Id: <1412443798-6436-8-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1412443798-6436-1-git-send-email-sjg@chromium.org> References: <1412443798-6436-1-git-send-email-sjg@chromium.org> Cc: Ian Campbell Subject: [U-Boot] [PATCH 07/23] dm: sunxi: Add support for serial using driver model X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add a driver for the designware serial UART used on sunxi. This just redirects to the normal ns16550 driver. Add a stdout-path to the device tree so that the correct UART is chosen. Signed-off-by: Simon Glass --- arch/arm/dts/sun7i-a20-pcduino3.dts | 4 ++++ drivers/serial/Makefile | 1 + drivers/serial/serial_dw.c | 39 +++++++++++++++++++++++++++++++++++++ include/configs/sun7i.h | 3 +++ include/configs/sunxi-common.h | 12 +++++++----- 5 files changed, 54 insertions(+), 5 deletions(-) create mode 100644 drivers/serial/serial_dw.c diff --git a/arch/arm/dts/sun7i-a20-pcduino3.dts b/arch/arm/dts/sun7i-a20-pcduino3.dts index 046dfc0..f7cc8e7 100644 --- a/arch/arm/dts/sun7i-a20-pcduino3.dts +++ b/arch/arm/dts/sun7i-a20-pcduino3.dts @@ -20,6 +20,10 @@ model = "LinkSprite pcDuino3"; compatible = "linksprite,pcduino3", "allwinner,sun7i-a20"; + chosen { + stdout-path = &uart0; + }; + soc@01c00000 { mmc0: mmc@01c0f000 { pinctrl-names = "default"; diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index edf6936..f57a664 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -19,6 +19,7 @@ obj-$(CONFIG_ALTERA_UART) += altera_uart.o obj-$(CONFIG_ALTERA_JTAG_UART) += altera_jtag_uart.o obj-$(CONFIG_ARM_DCC) += arm_dcc.o obj-$(CONFIG_ATMEL_USART) += atmel_usart.o +obj-$(CONFIG_DW_SERIAL) += serial_dw.o obj-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o obj-$(CONFIG_MCFUART) += mcfuart.o obj-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o diff --git a/drivers/serial/serial_dw.c b/drivers/serial/serial_dw.c new file mode 100644 index 0000000..a348f29 --- /dev/null +++ b/drivers/serial/serial_dw.c @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include + +static const struct udevice_id dw_serial_ids[] = { + { .compatible = "snps,dw-apb-uart" }, + { } +}; + +static int dw_serial_ofdata_to_platdata(struct udevice *dev) +{ + struct ns16550_platdata *plat = dev_get_platdata(dev); + int ret; + + ret = ns16550_serial_ofdata_to_platdata(dev); + if (ret) + return ret; + plat->clock = CONFIG_SYS_NS16550_CLK; + + return 0; +} + +U_BOOT_DRIVER(serial_ns16550) = { + .name = "serial_dw", + .id = UCLASS_SERIAL, + .of_match = dw_serial_ids, + .ofdata_to_platdata = dw_serial_ofdata_to_platdata, + .platdata_auto_alloc_size = sizeof(struct ns16550_platdata), + .priv_auto_alloc_size = sizeof(struct NS16550), + .probe = ns16550_serial_probe, + .ops = &ns16550_serial_ops, +}; diff --git a/include/configs/sun7i.h b/include/configs/sun7i.h index 2314e97..108694a 100644 --- a/include/configs/sun7i.h +++ b/include/configs/sun7i.h @@ -39,6 +39,9 @@ #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_DM) # define CONFIG_CMD_DM # define CONFIG_DM_GPIO +# define CONFIG_DM_SERIAL +# define CONFIG_SYS_MALLOC_F_LEN (1 << 10) +# define CONFIG_DW_SERIAL #endif /* diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h index 1d947d7..e26bdf9 100644 --- a/include/configs/sunxi-common.h +++ b/include/configs/sunxi-common.h @@ -36,12 +36,14 @@ #define CONFIG_SYS_NS16550 #define CONFIG_SYS_NS16550_SERIAL /* ns16550 reg in the low bits of cpu reg */ -#define CONFIG_SYS_NS16550_REG_SIZE -4 #define CONFIG_SYS_NS16550_CLK 24000000 -#define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE -#define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE -#define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE -#define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE +#ifndef CONFIG_DM_SERIAL +# define CONFIG_SYS_NS16550_REG_SIZE -4 +# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE +# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE +# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE +# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE +#endif /* DRAM Base */ #define CONFIG_SYS_SDRAM_BASE 0x40000000