From patchwork Mon Sep 29 19:35:19 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 394609 X-Patchwork-Delegate: sjg@chromium.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 5DFC11400D5 for ; Tue, 30 Sep 2014 05:46:33 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 908874B653; Mon, 29 Sep 2014 21:46:31 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id J564-mwy6YEr; Mon, 29 Sep 2014 21:46:31 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EAA244B62C; Mon, 29 Sep 2014 21:46:30 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8C9DD4B654 for ; Mon, 29 Sep 2014 21:46:26 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id chXSL5sHgAiY for ; Mon, 29 Sep 2014 21:46:26 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-ob0-f201.google.com (mail-ob0-f201.google.com [209.85.214.201]) by theia.denx.de (Postfix) with ESMTPS id 2C0EF4B622 for ; Mon, 29 Sep 2014 21:46:22 +0200 (CEST) Received: by mail-ob0-f201.google.com with SMTP id wp4so79600obc.2 for ; Mon, 29 Sep 2014 12:46:21 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=HOmCnPooqmFHHKwMLyjcItJ//SwEZ4Chr8xOAdotkwI=; b=blU/4gvMRKicAGZn/R7mhrgdIO1CVjJzhV8EB/2cOKJ8OQ/kECrZKbucjgZgTSYrwe QZNAWPZjXKkSl1wm8WNnI7XsO8xSwcqpNfLLtCGyR83+ZCXhPpTjFxO+6uR0StwVUDBz hkXKw7aHeExnRWyOOg/SR50DUy3P73ndMV8ftsP5CRtaHHUFFMXnA0lsFNCvcxd/hXDH GUguMZEB8SZvIEAM6beba6NrOqHChiMXuGrIbYMzpqTdVerpNScHRm1QoAzHuyHhOmlG 9UI35dNqzu1xwYxBwa8YiAUBy/t5rr2cVMuMXx1tfgAM89yAJN89woz2lqf5XjUcXycY EQZg== X-Gm-Message-State: ALoCoQlmmyYWsdhH01OR7YUEk7shXreSPVjLZGSe9Imi14s2KL1CCVSOemFoEQv3OsVokiuIX6VI X-Received: by 10.42.62.73 with SMTP id x9mr38884183ich.15.1412019981350; Mon, 29 Sep 2014 12:46:21 -0700 (PDT) Received: from corpmail-nozzle1-2.hot.corp.google.com ([100.108.1.103]) by gmr-mx.google.com with ESMTPS id j25si776601yhb.0.2014.09.29.12.46.20 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 29 Sep 2014 12:46:21 -0700 (PDT) Received: from kaki.bld.corp.google.com ([172.29.216.32]) by corpmail-nozzle1-2.hot.corp.google.com with ESMTP id pPXh564F.1; Mon, 29 Sep 2014 12:46:21 -0700 Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id C0504224D4E; Mon, 29 Sep 2014 13:37:27 -0600 (MDT) From: Simon Glass To: U-Boot Mailing List Date: Mon, 29 Sep 2014 13:35:19 -0600 Message-Id: <1412019326-6721-23-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.1.0.rc2.206.gedb03e5 In-Reply-To: <1412019326-6721-1-git-send-email-sjg@chromium.org> References: <1412019326-6721-1-git-send-email-sjg@chromium.org> Cc: u-boot-review@google.com, Jagannadha Sutradharudu Teki Subject: [U-Boot] [PATCH v3 22/29] dm: exynos: config: Use driver model for SPI flash X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.13 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Use driver model for exynos5 board SPI flash. Signed-off-by: Simon Glass --- Changes in v3: None Changes in v2: None include/configs/exynos-common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index eb6745e..6ba9bb7 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -22,6 +22,7 @@ #define CONFIG_DM_GPIO #define CONFIG_DM_SERIAL #define CONFIG_DM_SPI +#define CONFIG_DM_SPI_FLASH #define CONFIG_ARCH_CPU_INIT #define CONFIG_DISPLAY_CPUINFO