From patchwork Thu Sep 25 15:04:57 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ruchika Gupta X-Patchwork-Id: 393365 X-Patchwork-Delegate: yorksun@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 91234140186 for ; Fri, 26 Sep 2014 01:07:53 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CD73E4A029; Thu, 25 Sep 2014 17:07:51 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ZWnAjgOcZrqa; Thu, 25 Sep 2014 17:07:51 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 36BEE4A032; Thu, 25 Sep 2014 17:07:49 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9F6B14A032 for ; Thu, 25 Sep 2014 17:07:44 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id EwWDS3XSlUVr for ; Thu, 25 Sep 2014 17:07:42 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1on0134.outbound.protection.outlook.com [157.56.110.134]) by theia.denx.de (Postfix) with ESMTPS id 714024A029 for ; Thu, 25 Sep 2014 17:07:37 +0200 (CEST) Received: from CO2PR03CA0024.namprd03.prod.outlook.com (10.141.194.151) by BLUPR03MB151.namprd03.prod.outlook.com (10.255.212.25) with Microsoft SMTP Server (TLS) id 15.0.1034.13; Thu, 25 Sep 2014 15:07:34 +0000 Received: from BN1BFFO11FD010.protection.gbl (2a01:111:f400:7c10::1:105) by CO2PR03CA0024.outlook.office365.com (2a01:111:e400:1414::23) with Microsoft SMTP Server (TLS) id 15.0.1034.13 via Frontend Transport; Thu, 25 Sep 2014 15:07:33 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BN1BFFO11FD010.mail.protection.outlook.com (10.58.144.73) with Microsoft SMTP Server (TLS) id 15.0.1029.15 via Frontend Transport; Thu, 25 Sep 2014 15:07:32 +0000 Received: from perf-idc04.ap.freescale.net (perf-idc04.ap.freescale.net [10.232.14.49]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s8PF7SA6019800; Thu, 25 Sep 2014 08:07:30 -0700 From: Ruchika Gupta To: Date: Thu, 25 Sep 2014 20:34:57 +0530 Message-ID: <1411657497-27084-1-git-send-email-ruchika.gupta@freescale.com> X-Mailer: git-send-email 1.8.1.4 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10019020)(6009001)(189002)(199003)(87936001)(86362001)(33646002)(83072002)(87286001)(89996001)(85852003)(104016003)(110136001)(88136002)(77156001)(50986999)(93916002)(4396001)(68736004)(36756003)(20776003)(19580405001)(21056001)(76482002)(85306004)(92726001)(83322001)(44976005)(6806004)(92566001)(19580395003)(90102001)(80022003)(79102003)(81542003)(97736003)(74662003)(77982003)(81342003)(46102003)(120916001)(50226001)(74502003)(62966002)(10300001)(99396003)(105606002)(102836001)(47776003)(104166001)(95666004)(50466002)(48376002)(31966008)(84676001)(2351001)(64706001)(106466001)(107046002)(229853001); DIR:OUT; SFP:1102; SCL:1; SRVR:BLUPR03MB151; H:tx30smr01.am.freescale.net; FPR:; MLV:sfv; PTR:ErrorRetry; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Microsoft-Antispam: UriScan:; X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:;SRVR:BLUPR03MB151; X-Exchange-Antispam-Report-Test: UriScan:; X-Forefront-PRVS: 0345CFD558 Received-SPF: Fail (protection.outlook.com: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=protection.outlook.com; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=ruchika.gupta@freescale.com; X-OriginatorOrg: freescale.com Cc: York Sun , Ruchika Gupta Subject: [U-Boot] [PATCH] ls102x: configs - Add hash command in freescale LS1 platforms X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Hardware accelerated support for SHA-1 and SHA-256 has been added. Hash command enabled along with hardware accelerated support for SHA-1 and SHA-256 for platforms which have CAAM block. Signed-off-by: Ruchika Gupta CC: York Sun --- arch/arm/include/asm/arch-ls102xa/config.h | 10 ++++++++++ board/freescale/ls1021aqds/ls1021aqds.c | 10 ++++++++++ board/freescale/ls1021atwr/ls1021atwr.c | 9 +++++++++ include/configs/ls1021aqds.h | 6 ++++++ include/configs/ls1021atwr.h | 6 ++++++ 5 files changed, 41 insertions(+) diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h index ed78c33..b6cb857 100644 --- a/arch/arm/include/asm/arch-ls102xa/config.h +++ b/arch/arm/include/asm/arch-ls102xa/config.h @@ -20,6 +20,8 @@ #define CONFIG_SYS_FSL_ESDHC_ADDR (CONFIG_SYS_IMMR + 0x00560000) #define CONFIG_SYS_FSL_SCFG_ADDR (CONFIG_SYS_IMMR + 0x00570000) #define CONFIG_SYS_FSL_SERDES_ADDR (CONFIG_SYS_IMMR + 0x00ea0000) +#define CONFIG_SYS_FSL_SEC_ADDR (CONFIG_SYS_IMMR + 0x700000) +#define CONFIG_SYS_FSL_JR0_ADDR (CONFIG_SYS_IMMR + 0x710000) #define CONFIG_SYS_FSL_GUTS_ADDR (CONFIG_SYS_IMMR + 0x00ee0000) #define CONFIG_SYS_FSL_LS1_CLK_ADDR (CONFIG_SYS_IMMR + 0x00ee1000) #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR + 0x011c0500) @@ -71,8 +73,16 @@ #define CONFIG_MAX_CPUS 2 #define CONFIG_SYS_FSL_IFC_BANK_COUNT 8 #define CONFIG_NUM_DDR_CONTROLLERS 1 +#define CONFIG_SYS_FSL_SEC_OFFSET 0x00700000 +#define CONFIG_SYS_FSL_SEC_COMPAT 5 #else #error SoC not defined #endif +#define CONFIG_SYS_FSL_SEC_LE + +#if CONFIG_SYS_FSL_SEC_COMPAT >= 4 +#define CONFIG_FSL_CAAM +#endif + #endif /* _ASM_ARMV7_LS102XA_CONFIG_ */ diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c index 12e83f7..d6278b9 100644 --- a/board/freescale/ls1021aqds/ls1021aqds.c +++ b/board/freescale/ls1021aqds/ls1021aqds.c @@ -13,6 +13,7 @@ #include #include #include +#include #include "../common/qixis.h" #include "ls1021aqds_qixis.h" @@ -213,6 +214,15 @@ int config_serdes_mux(void) return 0; } +#if defined(CONFIG_MISC_INIT_R) +int misc_init_r(void) +{ + if (sec_init() < 0) + return -1; + return 0; +} +#endif + int board_init(void) { struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR; diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c index b522ff2..80903f6 100644 --- a/board/freescale/ls1021atwr/ls1021atwr.c +++ b/board/freescale/ls1021atwr/ls1021atwr.c @@ -280,6 +280,15 @@ int board_init(void) return 0; } +#if defined(CONFIG_MISC_INIT_R) +int misc_init_r(void) +{ + if (sec_init() < 0) + return -1; + return 0; +} +#endif + void ft_board_setup(void *blob, bd_t *bd) { ft_cpu_setup(blob, bd); diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h index 657e3b6..df2fc09 100644 --- a/include/configs/ls1021aqds.h +++ b/include/configs/ls1021aqds.h @@ -386,4 +386,10 @@ unsigned long get_board_ddr_clk(void); #define CONFIG_OF_BOARD_SETUP #define CONFIG_CMD_BOOTZ +#define CONFIG_MISC_INIT_R + +/* Hash command with SHA acceleration supported in hardware */ +#define CONFIG_CMD_HASH +#define CONFIG_SHA_HW_ACCEL + #endif diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h index 45b2272..7199c92 100644 --- a/include/configs/ls1021atwr.h +++ b/include/configs/ls1021atwr.h @@ -288,4 +288,10 @@ #define CONFIG_OF_BOARD_SETUP #define CONFIG_CMD_BOOTZ +#define CONFIG_MISC_INIT_R + +/* Hash command with SHA acceleration supported in hardware */ +#define CONFIG_CMD_HASH +#define CONFIG_SHA_HW_ACCEL + #endif