From patchwork Mon Sep 15 17:17:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 389442 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 0A219140142 for ; Tue, 16 Sep 2014 03:18:27 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 09572A7A49; Mon, 15 Sep 2014 19:18:20 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Aje25w72NtBO; Mon, 15 Sep 2014 19:18:19 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 59009AB560; Mon, 15 Sep 2014 19:18:10 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D6B8BA7A3F for ; Mon, 15 Sep 2014 19:18:07 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id iqPM6mfPSdp5 for ; Mon, 15 Sep 2014 19:18:07 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by theia.denx.de (Postfix) with ESMTPS id 4ACC8A7A3D for ; Mon, 15 Sep 2014 19:18:03 +0200 (CEST) Received: from mail.nefkom.net (unknown [192.168.8.184]) by mail-out.m-online.net (Postfix) with ESMTP id 3hxZ5l3MjQz3hhvP; Mon, 15 Sep 2014 19:18:03 +0200 (CEST) X-Auth-Info: btCa5oDVTFK1bb8o7KvVGMyseZ2fUTk0KDpYy7IW4TA= Received: from chi.lan (unknown [195.140.253.167]) by smtp-auth.mnet-online.de (Postfix) with ESMTPA id 3hxZ5l088CzvdWV; Mon, 15 Sep 2014 19:18:02 +0200 (CEST) From: Marek Vasut To: u-boot@lists.denx.de Date: Mon, 15 Sep 2014 19:17:59 +0200 Message-Id: <1410801479-8180-1-git-send-email-marex@denx.de> X-Mailer: git-send-email 2.0.0 In-Reply-To: <1410779188-6880-1-git-send-email-marex@denx.de> References: <1410779188-6880-1-git-send-email-marex@denx.de> Cc: Marek Vasut , Pavel Machek , Chin Liang See , Tom Rini Subject: [U-Boot] [PATCH 34/35] arm: socfpga: pl310: Map SDRAM to 0x0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Configure the PL310 address filter to make sure DRAM is mapped to 0x0. This code also configures the "remap" register of NIC-301 and sets the required 'mpuzero' bit. Signed-off-by: Marek Vasut Cc: Chin Liang See Cc: Dinh Nguyen Cc: Albert Aribaud Cc: Tom Rini Cc: Wolfgang Denk Cc: Pavel Machek --- arch/arm/cpu/armv7/socfpga/misc.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/cpu/armv7/socfpga/misc.c b/arch/arm/cpu/armv7/socfpga/misc.c index 8e25f09..4ff8bd8 100644 --- a/arch/arm/cpu/armv7/socfpga/misc.c +++ b/arch/arm/cpu/armv7/socfpga/misc.c @@ -12,11 +12,17 @@ #include #include #include +#include +#include DECLARE_GLOBAL_DATA_PTR; +static struct pl310_regs *const pl310 = + (struct pl310_regs *)CONFIG_SYS_PL310_BASE; static struct socfpga_system_manager *sysmgr_regs = (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS; +static struct nic301_registers *nic301_regs = + (struct nic301_registers *)SOCFPGA_L3REGS_ADDRESS; int dram_init(void) { @@ -129,6 +135,14 @@ static inline void socfpga_fpga_add(void) {} int misc_init_r(void) { + /* Configure the L2 controller to make SDRAM start at 0 */ +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET + writel(0x2, &nic301_regs->remap); +#else + writel(0x1, &nic301_regs->remap); /* remap.mpuzero */ + writel(0x1, &pl310->pl310_addr_filter_start); +#endif + /* Add device descriptor to FPGA device table */ socfpga_fpga_add();