From patchwork Mon Aug 18 07:16:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 380699 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 838BA140085 for ; Mon, 18 Aug 2014 17:19:52 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BC40D4B61D; Mon, 18 Aug 2014 09:19:37 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ELP5vGXHemM1; Mon, 18 Aug 2014 09:19:37 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A89EB4B5D2; Mon, 18 Aug 2014 09:18:10 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CFB67A740E for ; Mon, 18 Aug 2014 09:17:53 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ykR9vh4VkVPn for ; Mon, 18 Aug 2014 09:17:48 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-wg0-f47.google.com (mail-wg0-f47.google.com [74.125.82.47]) by theia.denx.de (Postfix) with ESMTPS id 28739A73E8 for ; Mon, 18 Aug 2014 09:17:02 +0200 (CEST) Received: by mail-wg0-f47.google.com with SMTP id b13so4585282wgh.30 for ; Mon, 18 Aug 2014 00:17:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=tLZ1LRIPDwB0Vi+ApTkKeAWjqVFbO8Q6ThpRihadOiI=; b=HvMTjXfJgwY0WEEOX6VVNts9OXSMJ5etnwY/bQo98qqBhW+q5YxrzOpENFBlL2jGF2 GVJTFxv906jPEWOuqtkbu7D2783BsYc1ryybPv0Sx9m93CpXvkYQyEhdR3n+Kqdmg9e0 Yx1VpVmD8V7xE280y4yDKOmDh1whMw/KCgJCJgfTHSccxVNnYjqcuYrqqyL7MsfaXfs9 6A0QFb86xpmtRjJmNybN53cF5tKH+vPigxKM4Kbb48q7kK4RfXLD7r2NIA2FB3aUXG0k NKHcwoW6Dpr3yD7NInBjrU4klKS3zGyLLFTA5d9/D0jeptZNnNeR8GIbrh8DMFj4FpOY IywA== X-Received: by 10.194.77.233 with SMTP id v9mr389639wjw.129.1408346222806; Mon, 18 Aug 2014 00:17:02 -0700 (PDT) Received: from localhost (port-52153.pppoe.wtnet.de. [46.59.204.94]) by mx.google.com with ESMTPSA id f3sm35098798wiz.0.2014.08.18.00.17.01 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 18 Aug 2014 00:17:02 -0700 (PDT) From: Thierry Reding To: Tom Warren , Simon Glass Date: Mon, 18 Aug 2014 09:16:26 +0200 Message-Id: <1408346196-30419-14-git-send-email-thierry.reding@gmail.com> X-Mailer: git-send-email 2.0.4 In-Reply-To: <1408346196-30419-1-git-send-email-thierry.reding@gmail.com> References: <1408346196-30419-1-git-send-email-thierry.reding@gmail.com> Cc: Stephen Warren , u-boot@lists.denx.de Subject: [U-Boot] [PATCH 13/23] ARM: tegra: Add XUSB pad controller on Tegra124 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Thierry Reding The XUSB pad controller is used for pinmuxing of the XUSB, PCIe and SATA lanes. Signed-off-by: Thierry Reding Acked-by: Stephen Warren --- arch/arm/dts/tegra124.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi index 4561c5f83943..d48f1a34ec3c 100644 --- a/arch/arm/dts/tegra124.dtsi +++ b/arch/arm/dts/tegra124.dtsi @@ -1,5 +1,6 @@ #include #include +#include #include "skeleton.dtsi" @@ -192,6 +193,15 @@ clocks = <&tegra_car 105>; }; + padctl: padctl@7009f000 { + compatible = "nvidia,tegra124-xusb-padctl"; + reg = <0x7009f000 0x1000>; + resets = <&tegra_car 142>; + reset-names = "padctl"; + + #phy-cells = <1>; + }; + sdhci@700b0000 { compatible = "nvidia,tegra124-sdhci"; reg = <0x700b0000 0x200>;