From patchwork Tue Jul 15 00:56:13 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Glass X-Patchwork-Id: 369798 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3D37D140142 for ; Tue, 15 Jul 2014 10:59:46 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 33CDDA758C; Tue, 15 Jul 2014 02:59:39 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id SsHbi6IEoKgq; Tue, 15 Jul 2014 02:59:38 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3F55DA75A9; Tue, 15 Jul 2014 02:58:32 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 1E280A7599 for ; Tue, 15 Jul 2014 02:58:22 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Qo-VO3dWMbxi for ; Tue, 15 Jul 2014 02:58:18 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-qc0-f202.google.com (mail-qc0-f202.google.com [209.85.216.202]) by theia.denx.de (Postfix) with ESMTPS id 3FDCDA7575 for ; Tue, 15 Jul 2014 02:58:07 +0200 (CEST) Received: by mail-qc0-f202.google.com with SMTP id i17so274670qcy.5 for ; Mon, 14 Jul 2014 17:58:06 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+1tc0HiNnVcqdvxfqlmT0qaOx/Lks7ThgN8w0g7f+Hg=; b=XteX+sOC07HuWk6dOmy+JN05rOan4Og85VjRaoREOSDEEJZ/EOnIjN/UoESevQp9GB nVNcT2VXgl/Ebrj0AMZ3J6RiJ+g6WVYyAjJZ/0IdHvgED+CsRFS1nr9Q2sJFLFTkl7t5 wIAdfUQyUqaVnAujul8TcJUQT9vkZVdlP/Z4uCXEnpd1PwF53cpG5OWVgB2loDVZOg+C UrAdTb76VxtPfC0WNTFPM0LKngciykHsgqwxPAA6TbwHtvCf4OkDFYpNIIsIVrDpB8BB sOx7YkdBvGt3p+xo3oydT0gVVZU/+V4diVtJ5+/471meb40tO53KgbfAoI0aO4dPciKs iO1A== X-Gm-Message-State: ALoCoQmUcRTtLwE1PAbyCWRm8EeybipIF4xo8E6rRf1FbaFBQ9FCxrFbt92eS1/EMg/VNzjucEC3 X-Received: by 10.224.103.135 with SMTP id k7mr9500555qao.6.1405385886831; Mon, 14 Jul 2014 17:58:06 -0700 (PDT) Received: from corp2gmr1-1.hot.corp.google.com (corp2gmr1-1.hot.corp.google.com [172.24.189.92]) by gmr-mx.google.com with ESMTPS id v12si859585yhe.2.2014.07.14.17.58.06 for (version=TLSv1.1 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 Jul 2014 17:58:06 -0700 (PDT) Received: from kaki.bld.corp.google.com (kaki.bld.corp.google.com [172.29.216.32]) by corp2gmr1-1.hot.corp.google.com (Postfix) with ESMTP id 99D2831C3AC; Mon, 14 Jul 2014 17:58:06 -0700 (PDT) Received: by kaki.bld.corp.google.com (Postfix, from userid 121222) id 4AE04220B38; Mon, 14 Jul 2014 18:58:06 -0600 (MDT) From: Simon Glass To: U-Boot Mailing List Date: Mon, 14 Jul 2014 18:56:13 -0600 Message-Id: <1405385792-4469-7-git-send-email-sjg@chromium.org> X-Mailer: git-send-email 2.0.0.526.g5318336 In-Reply-To: <1405385792-4469-1-git-send-email-sjg@chromium.org> References: <1405385792-4469-1-git-send-email-sjg@chromium.org> Cc: Jagannadha Sutradharudu Teki Subject: [U-Boot] [PATCH 06/25] dm: spi: Add a uclass for SPI X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Add a uclass which provides access to SPI buses and includes operations required by SPI. For a time driver model will need to co-exist with the legacy SPI interface so some parts of the header file are changed depending on which is in use. The exports are adjusted also since some functions are not available with driver model. Boards must define CONFIG_DM_SPI to use driver model for SPI. Signed-off-by: Simon Glass --- common/exports.c | 4 +- drivers/spi/Makefile | 4 + drivers/spi/spi-uclass.c | 253 +++++++++++++++++++++++++++++++++++++++++++++++ include/dm/uclass-id.h | 1 + include/spi.h | 140 ++++++++++++++++++++++++++ 5 files changed, 401 insertions(+), 1 deletion(-) create mode 100644 drivers/spi/spi-uclass.c diff --git a/common/exports.c b/common/exports.c index b97ca48..88fcfc8 100644 --- a/common/exports.c +++ b/common/exports.c @@ -27,10 +27,12 @@ unsigned long get_version(void) # define i2c_write dummy # define i2c_read dummy #endif -#ifndef CONFIG_CMD_SPI +#if !defined(CONFIG_CMD_SPI) || defined(CONFIG_DM_SPI) # define spi_init dummy # define spi_setup_slave dummy # define spi_free_slave dummy +#endif +#ifndef CONFIG_CMD_SPI # define spi_claim_bus dummy # define spi_release_bus dummy # define spi_xfer dummy diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index f02c35a..d1f1dd0 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -6,7 +6,11 @@ # # There are many options which enable SPI, so make this library available +ifdef CONFIG_DM_SPI +obj-y += spi-uclass.o +else obj-y += spi.o +endif obj-$(CONFIG_EP93XX_SPI) += ep93xx_spi.o obj-$(CONFIG_ALTERA_SPI) += altera_spi.o diff --git a/drivers/spi/spi-uclass.c b/drivers/spi/spi-uclass.c new file mode 100644 index 0000000..4057bce --- /dev/null +++ b/drivers/spi/spi-uclass.c @@ -0,0 +1,253 @@ +/* + * Copyright (c) 2014 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +static int spi_set_speed_mode(struct udevice *bus, int speed, int mode) +{ + struct dm_spi_ops *ops; + int ret; + + ops = spi_get_ops(bus); + if (ops->set_speed) + ret = (*ops->set_speed)(bus, speed); + else + ret = -EINVAL; + if (ret) { + printf("Cannot set speed (err=%d)\n", ret); + return ret; + } + + ops = spi_get_ops(bus); + if (ops->set_mode) + ret = (*ops->set_mode)(bus, mode); + else + ret = -EINVAL; + if (ret) { + printf("Cannot set mode (err=%d)\n", ret); + return ret; + } + + return 0; +} + +int spi_claim_bus(struct spi_slave *slave) +{ + struct udevice *dev = slave->dev; + struct udevice *bus = dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + struct dm_spi_bus *spi = bus->uclass_priv; + int speed; + int ret; + + speed = slave->max_hz; + if (spi->max_hz) { + if (speed) + speed = min(speed, spi->max_hz); + else + speed = spi->max_hz; + } + if (!speed) + speed = 100000; + ret = spi_set_speed_mode(bus, speed, slave->mode); + if (ret) + return ret; + + return ops->claim_bus ? ops->claim_bus(bus) : 0; +} + +void spi_release_bus(struct spi_slave *slave) +{ + struct udevice *dev = slave->dev; + struct udevice *bus = dev->parent; + struct dm_spi_ops *ops = spi_get_ops(bus); + + if (ops->release_bus) + spi_get_ops(bus)->release_bus(bus); +} + +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, + const void *dout, void *din, unsigned long flags) +{ + struct udevice *dev = slave->dev; + struct udevice *bus = dev->parent; + + if (bus->uclass->uc_drv->id != UCLASS_SPI) + return -EOPNOTSUPP; + + return spi_get_ops(bus)->xfer(bus, dev, bitlen, dout, din, flags); +} + +int spi_post_bind(struct udevice *dev) +{ + /* Scan the bus for devices */ + return dm_scan_fdt_node(dev, gd->fdt_blob, dev->of_offset, false); +} + +int spi_post_probe(struct udevice *dev) +{ + struct dm_spi_bus *spi = dev->uclass_priv; + + spi->max_hz = fdtdec_get_int(gd->fdt_blob, dev->of_offset, + "spi-max-frequency", 0); + + return 0; +} + +int spi_bind_device(struct udevice *bus, int cs, const char *drv_name, + const char *dev_name, struct udevice **slavep) +{ + struct driver *drv; + int ret; + + drv = lists_driver_lookup_name(drv_name); + if (!drv) { + puts("Cannot find spi_flash_std driver\n"); + return -ENOENT; + } + ret = device_bind(bus, drv, dev_name, NULL, -1, slavep); + if (ret) { + printf("Cannot create device named '%s' (err=%d)\n", + dev_name, ret); + return ret; + } + (*slavep)->req_seq = cs; + + return 0; +} + +int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp, + struct udevice **devp) +{ + struct udevice *bus, *dev; + int ret; + + ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, false, &bus); + if (ret) + return ret; + ret = device_find_child_by_seq(bus, cs, false, &dev); + if (ret) + return ret; + *busp = bus; + *devp = dev; + + return ret; +} + +int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode, + const char *drv_name, const char *dev_name, + struct udevice **devp, struct spi_slave **slavep) +{ + struct udevice *bus, *dev; + int ret; + + ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus); + if (ret) { + printf("Invalid bus %d (err=%d)\n", busnum, ret); + return ret; + } + ret = device_get_child_by_seq(bus, cs, &dev); + + /** + * If there is no such device, create one automatically. This means + * that we don't need a device tree node or platform data for the + * SPI flash chip - we will bind to the correct driver. + */ + if (ret == -ENODEV && drv_name) { + ret = spi_bind_device(bus, cs, drv_name, dev_name, &dev); + if (ret) + return ret; + } + if (ret) { + printf("Invalid chip select %d:%d (err=%d)\n", busnum, cs, + ret); + return ret; + } + + ret = spi_set_speed_mode(bus, speed, mode); + if (ret) + return ret; + + *devp = bus; + *slavep = dev_get_parentdata(dev); + + return 0; +} + +/* Compatibility function - to be removed */ +struct spi_slave *spi_setup_slave_fdt(const void *blob, int node, + int bus_node) +{ + struct udevice *bus, *dev; + int ret; + + ret = uclass_get_device_by_of_offset(UCLASS_SPI, bus_node, &bus); + if (ret) + return NULL; + ret = device_get_child_by_of_offset(bus, node, &dev); + if (ret) + return NULL; + return dev_get_parentdata(dev); +} + +/* Compatibility function - to be removed */ +struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, + unsigned int speed, unsigned int mode) +{ + struct spi_slave *slave; + struct udevice *dev; + int ret; + + ret = spi_get_bus_and_cs(busnum, cs, speed, mode, NULL, 0, &dev, + &slave); + if (ret) + return NULL; + + return slave; +} + +void spi_free_slave(struct spi_slave *slave) +{ + device_remove(slave->dev); + slave->dev = NULL; +} + +int spi_ofdata_to_platdata(const void *blob, int node, + struct spi_slave *spi) +{ + int mode = 0; + + spi->max_hz = fdtdec_get_int(blob, node, "spi-max-frequency", 0); + if (fdtdec_get_bool(blob, node, "spi-cpol")) + mode |= SPI_CPOL; + if (fdtdec_get_bool(blob, node, "spi-cpha")) + mode |= SPI_CPHA; + if (fdtdec_get_bool(blob, node, "spi-cs-high")) + mode |= SPI_CS_HIGH; + if (fdtdec_get_bool(blob, node, "spi-half-duplex")) + mode |= SPI_PREAMBLE; + spi->mode = mode; + + return 0; +} + +UCLASS_DRIVER(spi) = { + .id = UCLASS_SPI, + .name = "spi", + .post_bind = spi_post_bind, + .post_probe = spi_post_probe, + .per_device_auto_alloc_size = sizeof(struct dm_spi_bus), +}; diff --git a/include/dm/uclass-id.h b/include/dm/uclass-id.h index 7f0e37b..8207483 100644 --- a/include/dm/uclass-id.h +++ b/include/dm/uclass-id.h @@ -22,6 +22,7 @@ enum uclass_id { /* U-Boot uclasses start here */ UCLASS_GPIO, /* Bank of general-purpose I/O pins */ UCLASS_SERIAL, /* Serial UART */ + UCLASS_SPI, /* SPI bus */ UCLASS_COUNT, UCLASS_INVALID = -1, diff --git a/include/spi.h b/include/spi.h index b673be2..b5e9347 100644 --- a/include/spi.h +++ b/include/spi.h @@ -54,11 +54,19 @@ #define SPI_DEFAULT_WORDLEN 8 +#ifdef CONFIG_DM_SPI +struct dm_spi_bus { + uint max_hz; +}; + +#endif /* CONFIG_DM_SPI */ + /** * struct spi_slave - Representation of a SPI slave * * Drivers are expected to extend this with controller-specific data. * + * @dev: SPI slave device * @bus: ID of the bus that the slave is attached to. * @cs: ID of the chip select connected to the slave. * @op_mode_rx: SPI RX operation mode. @@ -71,8 +79,14 @@ * @flags: Indication of SPI flags. */ struct spi_slave { +#ifdef CONFIG_DM_SPI + struct udevice *dev; /* struct spi_slave is dev->parentdata */ + uint max_hz; + uint mode; +#else unsigned int bus; unsigned int cs; +#endif u8 op_mode_rx; u8 op_mode_tx; unsigned int wordlen; @@ -220,6 +234,8 @@ int spi_set_wordlen(struct spi_slave *slave, unsigned int wordlen); int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, void *din, unsigned long flags); +#ifndef CONFIG_DM_SPI + /** * Determine if a SPI chipselect is valid. * This function is provided by the board if the low-level SPI driver @@ -255,6 +271,7 @@ void spi_cs_deactivate(struct spi_slave *slave); * @hz: The transfer speed */ void spi_set_speed(struct spi_slave *slave, uint hz); +#endif /** * Write 8 bits, then read 8 bits. @@ -305,4 +322,127 @@ struct spi_slave *spi_setup_slave_fdt(const void *blob, int slave_node, struct spi_slave *spi_base_setup_slave_fdt(const void *blob, int busnum, int node); +#ifdef CONFIG_DM_SPI + +/** + * struct struct dm_spi_ops - Driver model SPI operations + * + * The uclass interface is implemented by all SPI devices which use + * driver model. + */ +struct dm_spi_ops { + /** + * Claim the bus and prepare it for communication. + * + * The device privided is the slave device. It's parent controller + * will be used to provide the communication. + * + * This must be called before doing any transfers with a SPI slave. It + * will enable and initialize any SPI hardware as necessary, and make + * sure that the SCK line is in the correct idle state. It is not + * allowed to claim the same bus for several slaves without releasing + * the bus in between. + * + * @device: The SPI slave + * + * Returns: 0 if the bus was claimed successfully, or a negative value + * if it wasn't. + */ + int (*claim_bus)(struct udevice *device); + + /** + * Release the SPI bus + * + * This must be called once for every call to spi_claim_bus() after + * all transfers have finished. It may disable any SPI hardware as + * appropriate. + * + * @device: The SPI slave + */ + int (*release_bus)(struct udevice *device); + + /** + * Set the word length for SPI transactions + * + * Set the word length (number of bits per word) for SPI transactions. + * + * @device: The SPI slave + * @wordlen: The number of bits in a word + * + * Returns: 0 on success, -ve on failure. + */ + int (*set_wordlen)(struct udevice *deiuce, unsigned int wordlen); + + /** + * SPI transfer + * + * This writes "bitlen" bits out the SPI MOSI port and simultaneously + * clocks "bitlen" bits in the SPI MISO port. That's just the way SPI + * works. + * + * The source of the outgoing bits is the "dout" parameter and the + * destination of the input bits is the "din" parameter. Note that + * "dout" and "din" can point to the same memory location, in which + * case the input data overwrites the output data (since both are + * buffered by temporary variables, this is OK). + * + * spi_xfer() interface: + * @device: The SPI bus which will be sending/receiving the data. + * @slave: The slave device to communicate with + * @bitlen: How many bits to write and read. + * @dout: Pointer to a string of bits to send out. The bits are + * held in a byte array and are sent MSB first. + * @din: Pointer to a string of bits that will be filled in. + * @flags: A bitwise combination of SPI_XFER_* flags. + * + * Returns: 0 on success, not -1 on failure + */ + int (*xfer)(struct udevice *device, struct udevice *slave, + unsigned int bitlen, const void *dout, void *din, + unsigned long flags); + + /** + * Set transfer speed. + * This sets a new speed to be applied for next spi_xfer(). + * @slave: The SPI slave + * @hz: The transfer speed + * @return 0 if OK, -ve on error + */ + int (*set_speed)(struct udevice *device, uint hz); + + /** + * Set the SPI mode/flags + * + * It is unclear if we want to set speed and mode together instead + * of separately. + * + * @slave: The SPI slave + * @mode: Requested SPI mode (SPI_... flags) + * @return 0 if OK, -ve on error + */ + int (*set_mode)(struct udevice *device, uint mode); +}; + +int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp, + struct udevice **devp); + +int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode, + const char *drv_name, const char *dev_name, + struct udevice **devp, struct spi_slave **slavep); + +int spi_bind_device(struct udevice *bus, int cs, const char *drv_name, + const char *dev_name, struct udevice **slavep); + +int spi_ofdata_to_platdata(const void *blob, int node, + struct spi_slave *spi); + +struct sandbox_state; +int sandbox_spi_get_emul(struct sandbox_state *state, + struct udevice *bus, struct udevice *slave, + struct udevice **emulp); + +/* Access the serial operations for a device */ +#define spi_get_ops(dev) ((struct dm_spi_ops *)(dev)->driver->ops) +#endif /* CONFIG_DM_SPI */ + #endif /* _SPI_H_ */