From patchwork Thu Jul 3 07:28:21 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Eibach X-Patchwork-Id: 366598 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 63B5014010A for ; Thu, 3 Jul 2014 17:31:05 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8CA814B610; Thu, 3 Jul 2014 09:30:15 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4FKqF4TSOa38; Thu, 3 Jul 2014 09:30:15 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B3C934B623; Thu, 3 Jul 2014 09:29:04 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CE42A4A04E for ; Thu, 3 Jul 2014 09:28:58 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id LVlaLCezO+Dq for ; Thu, 3 Jul 2014 09:28:55 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtprelay01.ispgateway.de (smtprelay01.ispgateway.de [80.67.31.24]) by theia.denx.de (Postfix) with ESMTPS id 93DF64A050 for ; Thu, 3 Jul 2014 09:28:39 +0200 (CEST) Received: from [217.7.185.210] (helo=bob3.testumgebung.local) by smtprelay01.ispgateway.de with esmtpa (Exim 4.68) (envelope-from ) id 1X2bRf-0008QQ-1f; Thu, 03 Jul 2014 09:28:39 +0200 From: dirk.eibach@gdsys.cc To: u-boot@lists.denx.de Date: Thu, 3 Jul 2014 09:28:21 +0200 Message-Id: <1404372506-15314-9-git-send-email-dirk.eibach@gdsys.cc> X-Mailer: git-send-email 1.8.3 In-Reply-To: <1404372506-15314-1-git-send-email-dirk.eibach@gdsys.cc> References: <1404372506-15314-1-git-send-email-dirk.eibach@gdsys.cc> X-Df-Sender: ZGlyay5laWJhY2hAZ2RzeXMuY2M= Cc: Stefan Roese Subject: [U-Boot] [PATCH v4 08/13] board: gdsys: Configure bridge on DP501 to support DDC only X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Dirk Eibach The I2C bridge on DP501 supports EDID, MCCS and HDCP by default. Allow EDID only to avoid I2C address conflicts. Signed-off-by: Dirk Eibach --- Changes in v4: None Changes in v3: None Changes in v2: None board/gdsys/common/dp501.c | 1 + include/configs/controlcenterd.h | 7 ++++--- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/board/gdsys/common/dp501.c b/board/gdsys/common/dp501.c index e00e589..7958bae 100644 --- a/board/gdsys/common/dp501.c +++ b/board/gdsys/common/dp501.c @@ -54,6 +54,7 @@ static void dp501_link_training(u8 addr) void dp501_powerup(u8 addr) { dp501_clrbits(addr, 0x0a, 0x30); /* power on encoder */ + dp501_setbits(addr, 0x0a, 0x0e); /* block HDCP and MCCS on I2C bride*/ i2c_reg_write(addr, 0x27, 0x30); /* Hardware auto detect DVO timing */ dp501_setbits(addr, 0x72, 0x80); /* DPCD read enable */ dp501_setbits(addr, 0x30, 0x20); /* RS polynomial select */ diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h index 868813f..ec3145f 100644 --- a/include/configs/controlcenterd.h +++ b/include/configs/controlcenterd.h @@ -199,9 +199,10 @@ #define CONFIG_SYS_FSL_I2C2_SPEED 400000 #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 -/* Probing DP501 I2C-Bridge will hang */ -#define CONFIG_SYS_I2C_NOPROBES { {0, 0x30}, {0, 0x37}, {0, 0x3a}, \ - {0, 0x3b}, {0, 0x50} } + +#ifndef CONFIG_TRAILBLAZER +#define CONFIG_CMD_I2C +#endif #define CONFIG_PCA9698 /* NXP PCA9698 */