From patchwork Tue Jun 10 06:26:52 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chin Liang See X-Patchwork-Id: 357739 X-Patchwork-Delegate: panto@antoniou-consulting.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 311891400AB for ; Tue, 10 Jun 2014 16:27:31 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6BC6F4A029; Tue, 10 Jun 2014 08:27:29 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id PwsBfudUdV-3; Tue, 10 Jun 2014 08:27:29 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 518814A02C; Tue, 10 Jun 2014 08:27:26 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D82D24A02C for ; Tue, 10 Jun 2014 08:27:21 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id varlWbH6c-uZ for ; Tue, 10 Jun 2014 08:27:18 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-bl2-obe.outbound.protection.outlook.com (mail-bl2lp0209.outbound.protection.outlook.com [207.46.163.209]) by theia.denx.de (Postfix) with ESMTPS id 625144A029 for ; Tue, 10 Jun 2014 08:27:14 +0200 (CEST) Received: from BN1BFFO11FD016.protection.gbl (10.58.144.34) by BN1BFFO11HUB060.protection.gbl (10.58.144.207) with Microsoft SMTP Server (TLS) id 15.0.959.15; Tue, 10 Jun 2014 06:26:59 +0000 Received: from sj-itexedge03.altera.priv.altera.com (66.35.236.227) by BN1BFFO11FD016.mail.protection.outlook.com (10.58.144.79) with Microsoft SMTP Server (TLS) id 15.0.959.15 via Frontend Transport; Tue, 10 Jun 2014 06:26:59 +0000 Received: from sj-mail01.altera.com (137.57.1.6) by sj-itexedge03.altera.priv.altera.com (66.35.236.227) with Microsoft SMTP Server id 14.3.174.1; Mon, 9 Jun 2014 23:25:49 -0700 Received: from clsee-VirtualBox.altera.com (clsee-virtualbox.altera.com [137.57.103.53]) by sj-mail01.altera.com (8.13.7+Sun/8.13.7) with ESMTP id s5A6Qskl022813; Mon, 9 Jun 2014 23:26:56 -0700 (PDT) From: Chin Liang See To: ZY - u-boot Date: Tue, 10 Jun 2014 01:26:52 -0500 Message-ID: <1402381612-3029-1-git-send-email-clsee@altera.com> X-Mailer: git-send-email 1.7.9.5 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:66.35.236.227; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(189002)(199002)(84676001)(31966008)(87936001)(21056001)(62966002)(48376002)(81342001)(74502001)(4396001)(76482001)(46102001)(74662001)(50226001)(36756003)(64706001)(81542001)(6806004)(50986999)(99396002)(89996001)(77156001)(88136002)(104166001)(53416003)(79102001)(33646001)(77982001)(20776003)(93916002)(83322001)(92726001)(86362001)(97736001)(47776003)(87286001)(80022001)(92566001)(50466002)(44976005)(85852003)(68736004)(19580395003)(83072002)(19580405001); DIR:OUT; SFP:; SCL:1; SRVR:BN1BFFO11HUB060; H:sj-itexedge03.altera.priv.altera.com; FPR:; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; X-OriginatorOrg: altera.onmicrosoft.com X-Microsoft-Antispam: BL:0; ACTION:Default; RISK:Low; SCL:0; SPMLVL:NotSpam; PCL:0; RULEID: X-Forefront-PRVS: 0238AEEDB0 Received-SPF: SoftFail (: domain of transitioning altera.com discourages use of 66.35.236.227 as permitted sender) Authentication-Results: spf=softfail (sender IP is 66.35.236.227) smtp.mailfrom=clsee@altera.com; Cc: Jaehoon Chung , Mischa Jonker , Pantelis Antoniou , Rajeshwari Shinde , Chin Liang See Subject: [U-Boot] [PATCH] mmc/dw_mmc: Fix clock divider calculation error for bypass mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de To fix the clock divider calculation error when the controller clock same as the operating frequency. This is known as bypass mode. In this mode, the divider should be 0. Signed-off-by: Chin Liang See Cc: Pantelis Antoniou Cc: Rajeshwari Shinde Cc: Jaehoon Chung Cc: Mischa Jonker --- drivers/mmc/dw_mmc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c index 5bf36a0..0df30bc 100644 --- a/drivers/mmc/dw_mmc.c +++ b/drivers/mmc/dw_mmc.c @@ -245,7 +245,10 @@ static int dwmci_setup_bus(struct dwmci_host *host, u32 freq) return -EINVAL; } - div = DIV_ROUND_UP(sclk, 2 * freq); + if (sclk == freq) + div = 0; /* bypass mode */ + else + div = DIV_ROUND_UP(sclk, 2 * freq); dwmci_writel(host, DWMCI_CLKENA, 0); dwmci_writel(host, DWMCI_CLKSRC, 0);