From patchwork Mon Jun 2 23:13:24 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tim Harvey X-Patchwork-Id: 355110 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B04E714009C for ; Tue, 3 Jun 2014 09:15:03 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C4F564B869; Tue, 3 Jun 2014 01:14:55 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id F6DJCS4J9DN4; Tue, 3 Jun 2014 01:14:55 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 03A524B809; Tue, 3 Jun 2014 01:14:31 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 63B90A7403 for ; Tue, 3 Jun 2014 01:14:26 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id f0XLzr27NqeI for ; Tue, 3 Jun 2014 01:14:23 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f51.google.com (mail-pa0-f51.google.com [209.85.220.51]) by theia.denx.de (Postfix) with ESMTPS id 9ACC5A73EE for ; Tue, 3 Jun 2014 01:13:52 +0200 (CEST) Received: by mail-pa0-f51.google.com with SMTP id kx10so2417570pab.38 for ; Mon, 02 Jun 2014 16:13:51 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ZPHkyMnRP3fwgshMGecqIFpCInK1wJ9DkGeQ+j+MqZI=; b=mEN/5Nah6mUOxCV+UlYqwoeLvcAc45nEIiMskxNfr/70tydzfSJdvI8zYKp33nFKZr vUXh8Lt0zI8bnCbaPf0LJlVhpmJ0AHSgLv2Xn4qE5X5P1RvYzO5hiSiCSA7n4Ni2senm wyrEQGVgT+ywLq4nrQgvO5KeGKqo2+MRodqqLjyvCUFN2ARAPWz5LC4DS0HinonPUxsK UGmnU1Yn/WQoObbBKxBOxBcFjGxe1O+oj4majDT2Svtj/77PaCdiLoJP0KLVPbtv1KBm /rWpxuCfxD6XQ1zERQWX9zeE/eH+Vn3x2uCl0OvsRZz7eVGkuQEstNqLEb3/Wl/JBExT vo2w== X-Gm-Message-State: ALoCoQl2i806uvNVAMyZUwlRVkAtEa5+EjrMF3QlpB48wod3Y5TRSGddE4pj3PbEyRGeBwd9hzGv X-Received: by 10.68.186.33 with SMTP id fh1mr43840191pbc.140.1401750831364; Mon, 02 Jun 2014 16:13:51 -0700 (PDT) Received: from tharvey-gw.gw (68-189-91-139.static.snlo.ca.charter.com. [68.189.91.139]) by mx.google.com with ESMTPSA id fd5sm12699849pad.12.2014.06.02.16.13.49 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 02 Jun 2014 16:13:50 -0700 (PDT) From: Tim Harvey To: Stefano Babic Date: Mon, 2 Jun 2014 16:13:24 -0700 Message-Id: <1401750807-5975-8-git-send-email-tharvey@gateworks.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <1401750807-5975-1-git-send-email-tharvey@gateworks.com> References: <1401750807-5975-1-git-send-email-tharvey@gateworks.com> Cc: Otavio Salvador , u-boot@lists.denx.de, Tom Rini , Stefan Roese Subject: [U-Boot] [PATCH v4 07/10] imx: iomux: add macros to setup iomux for multiple SoC types X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Allow imx_iomux_v3_setup_multiple_pads to take a multi-cpu pad_list and add macros for declaring the pad_list that take into account the SoC types supported using CONFIG_MX6QDL (supports both the MX6Q and MX6DL iomux). Cc: Stefan Roese Cc: Otavio Salvador Cc: Andy Ng Cc: Eric Nelson Cc: Tapani Utriainen Cc: Tom Rini Signed-off-by: Tim Harvey --- v4: - no changes v3: - remove commit msg 2nd paragrap about prior approaches - re-work to avoid needing to add a new function by making imx_iomux_v3_setup_multiple_pads more intelligent and adding macros that depend on SoC type support v2: - moved macros for declaring and using structs for array variant - removed non-related whitespace cleanup --- arch/arm/imx-common/iomux-v3.c | 16 ++++++++++++++-- arch/arm/include/asm/imx-common/iomux-v3.h | 25 +++++++++++++++++++++++++ 2 files changed, 39 insertions(+), 2 deletions(-) diff --git a/arch/arm/imx-common/iomux-v3.c b/arch/arm/imx-common/iomux-v3.c index 6e46ea8..306183a 100644 --- a/arch/arm/imx-common/iomux-v3.c +++ b/arch/arm/imx-common/iomux-v3.c @@ -11,6 +11,7 @@ #include #include #include +#include #include static void *base = (void *)IOMUXC_BASE_ADDR; @@ -54,12 +55,23 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad) #endif } +/* configures a list of pads within declared with IOMUX_PADS macro */ void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list, unsigned count) { iomux_v3_cfg_t const *p = pad_list; + int stride; int i; - for (i = 0; i < count; i++) - imx_iomux_v3_setup_pad(*p++); +#if defined(CONFIG_MX6QDL) + stride = 2; + if (!is_cpu_type(MXC_CPU_MX6Q) && !is_cpu_type(MXC_CPU_MX6D)) + p += 1; +#else + stride = 1; +#endif + for (i = 0; i < count; i++) { + imx_iomux_v3_setup_pad(*p); + p += stride; + } } diff --git a/arch/arm/include/asm/imx-common/iomux-v3.h b/arch/arm/include/asm/imx-common/iomux-v3.h index cca920b..dfe1ebf 100644 --- a/arch/arm/include/asm/imx-common/iomux-v3.h +++ b/arch/arm/include/asm/imx-common/iomux-v3.h @@ -175,4 +175,29 @@ void imx_iomux_v3_setup_pad(iomux_v3_cfg_t pad); void imx_iomux_v3_setup_multiple_pads(iomux_v3_cfg_t const *pad_list, unsigned count); +/* macros for declaring and using pinmux array */ +#if defined(CONFIG_MX6QDL) +#define IOMUX_PADS(x) (MX6Q_##x), (MX6DL_##x) +#define SETUP_IOMUX_PAD(def) \ +if (is_cpu_type(MXC_CPU_MX6Q)) { \ + imx_iomux_v3_setup_pad(MX6Q_##def); \ +} else { \ + imx_iomux_v3_setup_pad(MX6DL_##def); \ +} +#define SETUP_IOMUX_PADS(x) \ + imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)/2) +#elif defined(CONFIG_MX6Q) || defined(CONFIG_MX6D) +#define IOMUX_PADS(x) MX6Q_##x +#define SETUP_IOMUX_PAD(def) \ + imx_iomux_v3_setup_pad(MX6Q_##def); +#define SETUP_IOMUX_PADS(x) \ + imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)) +#else +#define IOMUX_PADS(x) MX6DL_##x +#define SETUP_IOMUX_PAD(def) \ + imx_iomux_v3_setup_pad(MX6DL_##def); +#define SETUP_IOMUX_PADS(x) \ + imx_iomux_v3_setup_multiple_pads(x, ARRAY_SIZE(x)) +#endif + #endif /* __MACH_IOMUX_V3_H__*/