From patchwork Mon May 19 20:53:37 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tom Rini X-Patchwork-Id: 350409 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 2F157140084 for ; Tue, 20 May 2014 06:54:14 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 853A84B66B; Mon, 19 May 2014 22:54:05 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8FO9YA6s7KLo; Mon, 19 May 2014 22:54:05 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2EDA74B6AF; Mon, 19 May 2014 22:53:59 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6EE804B673 for ; Mon, 19 May 2014 22:53:53 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 24whrwCyBAxe for ; Mon, 19 May 2014 22:53:50 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-qc0-f177.google.com (mail-qc0-f177.google.com [209.85.216.177]) by theia.denx.de (Postfix) with ESMTPS id 339A94B66B for ; Mon, 19 May 2014 22:53:46 +0200 (CEST) Received: by mail-qc0-f177.google.com with SMTP id i17so9796116qcy.8 for ; Mon, 19 May 2014 13:53:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id; bh=zq+wtLlTprUp6VkWVJ7PKJLvY80ih7jE9LdOL/3aeto=; b=CXFBqCdtEJ3apbYplFFUhtUi1Zd0Woqs3Uyn2TPHjyPS/6uvZ574GevlvPF+ok16UT Q5lCIfz2m7v5GCGf4p0xsr7STLcabeJ2ElabB1wEc1gDp2duwcIWOsficArhBpjDHxN2 ElMwjZACZAd/+j1ls2FbpX0fx69koUSlXUW3Iat/joy8fwTnjbKHofN+rEnIIvd8KRg7 AI1VyEuXKMxaK4r0rgCHQFsgk/YivjDIKQU98CTl3534jaSUqAcUFZMkKF357emUaHuu YhG+k2vsNQPlE9eT6QThBKVEvh1Q7XjCeSgB1tWcsxSOB26aBo41U4XkhU38nEAZAn2+ 32tw== X-Received: by 10.224.152.19 with SMTP id e19mr51683764qaw.94.1400532822787; Mon, 19 May 2014 13:53:42 -0700 (PDT) Received: from localhost.localdomain (cpe-098-121-186-226.ec.res.rr.com. [98.121.186.226]) by mx.google.com with ESMTPSA id f38sm11487413qgd.49.2014.05.19.13.53.41 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Mon, 19 May 2014 13:53:42 -0700 (PDT) From: Tom Rini To: u-boot@lists.denx.de Date: Mon, 19 May 2014 16:53:37 -0400 Message-Id: <1400532818-807-1-git-send-email-trini@ti.com> X-Mailer: git-send-email 1.7.9.5 Cc: Sourav Poddar Subject: [U-Boot] [PATCH v2 1/2] am43xx_evm: Add qspiboot target X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Sourav Poddar The ePOS EVM and EVM SK have QSPI as an option to boot. Add a qspiboot target that utilizes QSPI for env and so forth as an example of best practices. As QSPI is booted from directly we need to chang CONFIG_SYS_TEXT_BASE. Note that on ePOS EVM the QSPI and NAND are mutually exclusive choices we need to handle that elsewhere, once NAND support is also added. Signed-off-by: Sourav Poddar Signed-off-by: Tom Rini --- arch/arm/cpu/armv7/am33xx/board.c | 2 +- board/ti/am43xx/Makefile | 2 +- board/ti/am43xx/board.c | 2 +- boards.cfg | 1 + include/configs/am43xx_evm.h | 31 ++++++++++++++++++++++++++++--- include/configs/ti_armv7_common.h | 2 +- 6 files changed, 33 insertions(+), 7 deletions(-) diff --git a/arch/arm/cpu/armv7/am33xx/board.c b/arch/arm/cpu/armv7/am33xx/board.c index 453ad72..9a69b6c 100644 --- a/arch/arm/cpu/armv7/am33xx/board.c +++ b/arch/arm/cpu/armv7/am33xx/board.c @@ -224,7 +224,7 @@ void s_init(void) set_uart_mux_conf(); setup_clocks_for_console(); uart_soft_reset(); -#ifdef CONFIG_NOR_BOOT +#if defined(CONFIG_NOR_BOOT) || defined(CONFIG_QSPI_BOOT) gd->baudrate = CONFIG_BAUDRATE; serial_init(); gd->have_console = 1; diff --git a/board/ti/am43xx/Makefile b/board/ti/am43xx/Makefile index cb5fe88..36ecb30 100644 --- a/board/ti/am43xx/Makefile +++ b/board/ti/am43xx/Makefile @@ -6,7 +6,7 @@ # SPDX-License-Identifier: GPL-2.0+ # -ifdef CONFIG_SPL_BUILD +ifeq ($(CONFIG_SKIP_LOWLEVEL_INIT),) obj-y := mux.o endif diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c index 3078fc1..5b11eb2 100644 --- a/board/ti/am43xx/board.c +++ b/board/ti/am43xx/board.c @@ -70,7 +70,7 @@ static int read_eeprom(struct am43xx_board_id *header) return 0; } -#ifdef CONFIG_SPL_BUILD +#ifndef CONFIG_SKIP_LOWLEVEL_INIT #define NUM_OPPS 6 diff --git a/boards.cfg b/boards.cfg index 0497a91..19c19c5 100644 --- a/boards.cfg +++ b/boards.cfg @@ -276,6 +276,7 @@ Active arm armv7 am33xx ti am335x Active arm armv7 am33xx ti am335x am335x_evm_uart5 am335x_evm:SERIAL6,CONS_INDEX=6,NAND Tom Rini Active arm armv7 am33xx ti am335x am335x_evm_usbspl am335x_evm:SERIAL1,CONS_INDEX=1,NAND,SPL_USBETH_SUPPORT Tom Rini Active arm armv7 am33xx ti am43xx am43xx_evm am43xx_evm:SERIAL1,CONS_INDEX=1 Lokesh Vutla +Active arm armv7 am33xx ti am43xx am43xx_evm_qspiboot am43xx_evm:SERIAL1,CONS_INDEX=1,QSPI,QSPI_BOOT Lokesh Vutla Active arm armv7 am33xx ti ti814x ti814x_evm - Matt Porter Active arm armv7 am33xx ti ti816x ti816x_evm - - Active arm armv7 at91 atmel sama5d3_xplained sama5d3_xplained_mmc sama5d3_xplained:SAMA5D3,SYS_USE_MMC Bo Shen diff --git a/include/configs/am43xx_evm.h b/include/configs/am43xx_evm.h index c574ed4..94126c7 100644 --- a/include/configs/am43xx_evm.h +++ b/include/configs/am43xx_evm.h @@ -48,15 +48,15 @@ * Since SPL did pll and ddr initialization for us, * we don't need to do it twice. */ -#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_NOR_BOOT) +#if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_QSPI_BOOT) #define CONFIG_SKIP_LOWLEVEL_INIT #endif /* Now bring in the rest of the common code. */ #include -/* Always 128 KiB env size */ -#define CONFIG_ENV_SIZE (128 << 10) +/* Always 64 KiB env size */ +#define CONFIG_ENV_SIZE (64 << 10) #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG @@ -86,6 +86,30 @@ #define CONFIG_OMAP_USB_PHY #define CONFIG_AM437X_USB2PHY2_HOST +#ifdef CONFIG_QSPI_BOOT +#define CONFIG_SYS_TEXT_BASE 0x30000000 +#undef CONFIG_ENV_IS_NOWHERE +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_SYS_REDUNDAND_ENVIRONMENT +#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED +#define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ +#define CONFIG_ENV_OFFSET 0x110000 +#define CONFIG_ENV_OFFSET_REDUND 0x120000 +#ifdef MTDIDS_DEFAULT +#undef MTDIDS_DEFAULT +#endif +#ifdef MTDPARTS_DEFAULT +#undef MTDPARTS_DEFAULT +#endif +#define MTDPARTS_DEFAULT "mtdparts=qspi.0:512k(QSPI.u-boot)," \ + "512k(QSPI.u-boot.backup)," \ + "512k(QSPI.u-boot-spl-os)," \ + "64k(QSPI.u-boot-env)," \ + "64k(QSPI.u-boot-env.backup)," \ + "8m(QSPI.kernel)," \ + "-(QSPI.file-system)" +#endif + /* SPI */ #undef CONFIG_OMAP3_SPI #define CONFIG_TI_QSPI @@ -94,6 +118,7 @@ #define CONFIG_CMD_SF #define CONFIG_CMD_SPI #define CONFIG_TI_SPI_MMAP +#define CONFIG_SPI_FLASH_BAR #define CONFIG_QSPI_SEL_GPIO 48 #define CONFIG_SF_DEFAULT_SPEED 48000000 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 diff --git a/include/configs/ti_armv7_common.h b/include/configs/ti_armv7_common.h index 4854272..3bf4413 100644 --- a/include/configs/ti_armv7_common.h +++ b/include/configs/ti_armv7_common.h @@ -196,7 +196,7 @@ * under common/spl/. Given our generally common memory map, we set a * number of related defaults and sizes here. */ -#ifndef CONFIG_NOR_BOOT +#if !defined(CONFIG_NOR_BOOT) && !defined(CONFIG_QSPI_BOOT) #define CONFIG_SPL #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_OS_BOOT