From patchwork Thu May 15 11:24:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shengzhou Liu X-Patchwork-Id: 349191 X-Patchwork-Delegate: yorksun@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 96AFC1400DE for ; Thu, 15 May 2014 22:11:32 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AFF6F4BA55; Thu, 15 May 2014 14:11:30 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2O3Wu0hyGoY2; Thu, 15 May 2014 14:11:30 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9B07F4BA60; Thu, 15 May 2014 14:11:27 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E87504BA60 for ; Thu, 15 May 2014 14:11:21 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id nECWrgwdhtjT for ; Thu, 15 May 2014 14:11:11 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-by2-obe.outbound.protection.outlook.com (mail-by2lp0236.outbound.protection.outlook.com [207.46.163.236]) by theia.denx.de (Postfix) with ESMTPS id 335214BA55 for ; Thu, 15 May 2014 14:11:05 +0200 (CEST) Received: from BLUPR03CA028.namprd03.prod.outlook.com (10.141.30.21) by BLUPR03MB389.namprd03.prod.outlook.com (10.141.78.11) with Microsoft SMTP Server (TLS) id 15.0.944.11; Thu, 15 May 2014 12:10:56 +0000 Received: from BL2FFO11FD020.protection.gbl (207.46.163.211) by BLUPR03CA028.outlook.office365.com (10.141.30.21) with Microsoft SMTP Server (TLS) id 15.0.949.11 via Frontend Transport; Thu, 15 May 2014 12:10:56 +0000 Received: from tx30smr01.am.freescale.net (192.88.168.50) by BL2FFO11FD020.mail.protection.outlook.com (10.173.161.38) with Microsoft SMTP Server (TLS) id 15.0.939.9 via Frontend Transport; Thu, 15 May 2014 12:10:55 +0000 Received: from rock.ap.freescale.net (rock.ap.freescale.net [10.193.20.106]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id s4FCAkoo001587; Thu, 15 May 2014 05:10:53 -0700 From: Shengzhou Liu To: , Date: Thu, 15 May 2014 19:24:11 +0800 Message-ID: <1400153051-31346-1-git-send-email-Shengzhou.Liu@freescale.com> X-Mailer: git-send-email 1.8.0 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.168.50; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(6009001)(189002)(199002)(36756003)(31966008)(81342001)(74662001)(74502001)(76482001)(48376002)(77982001)(50466002)(64706001)(80022001)(47776003)(20776003)(46102001)(81542001)(21056001)(62966002)(79102001)(92726001)(92566001)(97736001)(575784001)(86362001)(93916002)(84676001)(85852003)(83072002)(6806004)(89996001)(88136002)(99396002)(50986999)(87286001)(87936001)(4396001)(68736004)(77156001)(50226001)(19580405001)(77096999)(44976005)(19580395003)(83322001); DIR:OUT; SFP:; SCL:1; SRVR:BLUPR03MB389; H:tx30smr01.am.freescale.net; FPR:; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:; MIME-Version: 1.0 X-Forefront-PRVS: 0212BDE3BE Received-SPF: Fail (: domain of freescale.com does not designate 192.88.168.50 as permitted sender) receiver=; client-ip=192.88.168.50; helo=tx30smr01.am.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.168.50) smtp.mailfrom=Shengzhou.Liu@freescale.com; X-OriginatorOrg: freescale.com Subject: [U-Boot] [PATCH] board/t208x: update t2080qds/t2080rdb for errata A-007186 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de As errata A-007186, we need to use the alternate serdes protocol instead of those impacted protocols. - add support for serdes protocols: 0x1b, 0x50, 0x5e, 0x64, 0x6a, 0xd2, 0x67, 0x70. - update t2080_rcw.cfg to adapt to new rcw_66_15 for t2080qds and t2080rdb. Signed-off-by: Shengzhou Liu --- arch/powerpc/cpu/mpc85xx/t2080_serdes.c | 26 +++++++++++++++++++++++--- board/freescale/t208xqds/eth_t208xqds.c | 8 ++++++++ board/freescale/t208xqds/t2080_rcw.cfg | 2 +- board/freescale/t208xqds/t208xqds.c | 12 +++++------- board/freescale/t208xrdb/t2080_rcw.cfg | 2 +- 5 files changed, 38 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c index 07e27de..2b7c698 100644 --- a/arch/powerpc/cpu/mpc85xx/t2080_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/t2080_serdes.c @@ -43,6 +43,10 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0x6C, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, PCIE4, PCIE4, PCIE4} }, + {0x1B, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, + SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, + SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x1C, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, @@ -59,18 +63,34 @@ static const struct serdes_config serdes1_cfg_tbl[] = { SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, SGMII_FM1_DTSEC3, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x50, {XAUI_FM1_MAC9, XAUI_FM1_MAC9, + XAUI_FM1_MAC9, XAUI_FM1_MAC9, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x51, {XAUI_FM1_MAC9, XAUI_FM1_MAC9, XAUI_FM1_MAC9, XAUI_FM1_MAC9, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x5E, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x5F, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x64, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x65, {HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, HIGIG_FM1_MAC9, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0x6A, {XFI_FM1_MAC9, XFI_FM1_MAC10, + XFI_FM1_MAC1, XFI_FM1_MAC2, + PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0x6B, {XFI_FM1_MAC9, XFI_FM1_MAC10, XFI_FM1_MAC1, XFI_FM1_MAC2, PCIE4, SGMII_FM1_DTSEC4, @@ -115,6 +135,9 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0xD9, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, + {0xD2, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, + SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, + SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, {0xD3, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, @@ -127,8 +150,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0x66, {XFI_FM1_MAC9, XFI_FM1_MAC10, XFI_FM1_MAC1, XFI_FM1_MAC2, PCIE4, PCIE4, PCIE4, PCIE4} }, - -#if defined(CONFIG_PPC_T2081) {0xAA, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4} }, {0xCA, {PCIE3, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC1, @@ -137,7 +158,6 @@ static const struct serdes_config serdes1_cfg_tbl[] = { {0x70, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, PCIE4, SGMII_FM1_DTSEC4, SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} }, -#endif {} }; diff --git a/board/freescale/t208xqds/eth_t208xqds.c b/board/freescale/t208xqds/eth_t208xqds.c index d7a804d..5879198 100644 --- a/board/freescale/t208xqds/eth_t208xqds.c +++ b/board/freescale/t208xqds/eth_t208xqds.c @@ -416,6 +416,7 @@ int board_eth_init(bd_t *bis) fm_info_set_phy_address(FM1_DTSEC10, RGMII_PHY2_ADDR); switch (srds_s1) { + case 0x1b: case 0x1c: case 0x95: case 0xa2: @@ -429,8 +430,11 @@ int board_eth_init(bd_t *bis) fm_info_set_phy_address(FM1_DTSEC5, SGMII_CARD_PORT3_PHY_ADDR); fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR); break; + case 0x50: case 0x51: + case 0x5e: case 0x5f: + case 0x64: case 0x65: /* T2080QDS: XAUI/HiGig in Slot3; T2081QDS: in Slot2 */ fm_info_set_phy_address(FM1_10GEC1, FM1_10GEC1_PHY_ADDR); @@ -439,6 +443,7 @@ int board_eth_init(bd_t *bis) fm_info_set_phy_address(FM1_DTSEC6, SGMII_CARD_PORT4_PHY_ADDR); break; case 0x66: + case 0x67: /* * XFI does not need a PHY to work, but to avoid U-boot use * default PHY address which is zero to a MAC when it found @@ -453,6 +458,7 @@ int board_eth_init(bd_t *bis) fm_info_set_phy_address(FM1_10GEC3, 6); fm_info_set_phy_address(FM1_10GEC4, 7); break; + case 0x6a: case 0x6b: fm_info_set_phy_address(FM1_10GEC1, 4); fm_info_set_phy_address(FM1_10GEC2, 5); @@ -470,6 +476,7 @@ int board_eth_init(bd_t *bis) fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR); fm_info_set_phy_address(FM1_DTSEC2, SGMII_CARD_PORT4_PHY_ADDR); break; + case 0x70: case 0x71: /* SGMII in Slot3 */ fm_info_set_phy_address(FM1_DTSEC1, SGMII_CARD_PORT3_PHY_ADDR); @@ -625,6 +632,7 @@ int board_eth_init(bd_t *bis) fm_info_set_mdio(i, mii_dev_for_muxval(mdio_mux[i])); if ((srds_s1 == 0x66) || (srds_s1 == 0x6b) || + (srds_s1 == 0x6a) || (srds_s1 == 0x70) || (srds_s1 == 0x6c) || (srds_s1 == 0x6d) || (srds_s1 == 0x71)) { /* As XFI is in cage intead of a slot, so diff --git a/board/freescale/t208xqds/t2080_rcw.cfg b/board/freescale/t208xqds/t2080_rcw.cfg index c2ad0fd..972dedc 100644 --- a/board/freescale/t208xqds/t2080_rcw.cfg +++ b/board/freescale/t208xqds/t2080_rcw.cfg @@ -3,6 +3,6 @@ aa55aa55 010e0100 #SerDes Protocol: 0x66_0x16 #Core/DDR: 1533Mhz/2133MT/s 12100017 15000000 00000000 00000000 -66160002 00008400 e8104000 c1000000 +66150002 00008400 e8104000 c1000000 00000000 00000000 00000000 000307fc 00000000 00000000 00000000 00000004 diff --git a/board/freescale/t208xqds/t208xqds.c b/board/freescale/t208xqds/t208xqds.c index 9cfc0bd..1353439 100644 --- a/board/freescale/t208xqds/t208xqds.c +++ b/board/freescale/t208xqds/t208xqds.c @@ -105,6 +105,7 @@ int brd_mux_lane_to_slot(void) /* SerDes1 is not enabled */ break; #if defined(CONFIG_T2080QDS) + case 0x1b: case 0x1c: case 0xa2: /* SD1(A:D) => SLOT3 SGMII @@ -126,6 +127,7 @@ int brd_mux_lane_to_slot(void) */ QIXIS_WRITE(brdcfg[12], 0x3a); break; + case 0x50: case 0x51: /* SD1(A:D) => SLOT3 XAUI * SD1(E) => SLOT1 PCIe4 @@ -140,6 +142,7 @@ int brd_mux_lane_to_slot(void) */ QIXIS_WRITE(brdcfg[12], 0xfe); break; + case 0x6a: case 0x6b: /* SD1(A:D) => XFI cage * SD1(E) => SLOT1 PCIe4 @@ -184,6 +187,7 @@ int brd_mux_lane_to_slot(void) QIXIS_WRITE(brdcfg[12], 0x1a); break; #elif defined(CONFIG_T2081QDS) + case 0x50: case 0x51: /* SD1(A:D) => SLOT2 XAUI * SD1(E) => SLOT1 PCIe4 x1 @@ -192,6 +196,7 @@ int brd_mux_lane_to_slot(void) QIXIS_WRITE(brdcfg[12], 0x98); QIXIS_WRITE(brdcfg[13], 0x70); break; + case 0x6a: case 0x6b: /* SD1(A:D) => XFI SFP Module * SD1(E) => SLOT1 PCIe4 x1 @@ -201,13 +206,6 @@ int brd_mux_lane_to_slot(void) QIXIS_WRITE(brdcfg[13], 0x70); break; case 0x6c: - /* SD1(A:B) => XFI SFP Module - * SD1(C:D) => SLOT2 SGMII - * SD1(E:H) => SLOT1 PCIe4 x4 - */ - QIXIS_WRITE(brdcfg[12], 0xe8); - QIXIS_WRITE(brdcfg[13], 0x0); - break; case 0x6d: /* SD1(A:B) => XFI SFP Module * SD1(C:D) => SLOT2 SGMII diff --git a/board/freescale/t208xrdb/t2080_rcw.cfg b/board/freescale/t208xrdb/t2080_rcw.cfg index cd62cc8..15e1bf4 100644 --- a/board/freescale/t208xrdb/t2080_rcw.cfg +++ b/board/freescale/t208xrdb/t2080_rcw.cfg @@ -3,6 +3,6 @@ aa55aa55 010e0100 #SerDes Protocol: 0x66_0x16 #Core/DDR: 1533Mhz/1600MT/s 120c0017 15000000 00000000 00000000 -66160002 00008400 ec104000 c1000000 +66150002 00008400 ec104000 c1000000 00000000 00000000 00000000 000307fc 00000000 00000000 00000000 00000004