From patchwork Thu May 15 08:57:03 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jaehoon Chung X-Patchwork-Id: 349130 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 28969140083 for ; Thu, 15 May 2014 18:58:52 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BE20FA7415; Thu, 15 May 2014 10:58:34 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 1bduzIFzAhsO; Thu, 15 May 2014 10:58:34 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 636AF4BE15; Thu, 15 May 2014 10:57:51 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 171B74BD44 for ; Thu, 15 May 2014 10:57:41 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9Kc2KE4ce2WW for ; Thu, 15 May 2014 10:57:40 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) by theia.denx.de (Postfix) with ESMTPS id 9EDF94BDAF for ; Thu, 15 May 2014 10:57:26 +0200 (CEST) Received: from epcpsbgr5.samsung.com (u145.gpu120.samsung.co.kr [203.254.230.145]) by mailout3.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTP id <0N5L00BHFY7CGG20@mailout3.samsung.com> for u-boot@lists.denx.de; Thu, 15 May 2014 17:57:12 +0900 (KST) Received: from epcpsbgm2.samsung.com ( [172.20.52.112]) by epcpsbgr5.samsung.com (EPCPMTA) with SMTP id E3.13.11496.86184735; Thu, 15 May 2014 17:57:12 +0900 (KST) X-AuditID: cbfee691-b7f3e6d000002ce8-d8-537481680c3d Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm2.samsung.com (EPCPMTA) with SMTP id EF.91.25708.86184735; Thu, 15 May 2014 17:57:12 +0900 (KST) Received: from localhost.localdomain ([10.252.81.186]) by mmp1.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0N5L00D1IY7B2MH0@mmp1.samsung.com>; Thu, 15 May 2014 17:57:12 +0900 (KST) From: Jaehoon Chung To: u-boot@lists.denx.de Date: Thu, 15 May 2014 17:57:03 +0900 Message-id: <1400144230-9829-8-git-send-email-jh80.chung@samsung.com> X-Mailer: git-send-email 1.7.9.5 In-reply-to: <1400144230-9829-1-git-send-email-jh80.chung@samsung.com> References: <1400144230-9829-1-git-send-email-jh80.chung@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrKLMWRmVeSWpSXmKPExsWyRsSkQDejsSTYYHKLlsXpT9vYLW78amO1 ePNwM6NFx5EWRot1T9ayWuy6PZnF4u3eTnaLc5d2sTpweMz7OZHJo39TB7PH2Ts7GD36tqxi DGCJ4rJJSc3JLEst0rdL4Mq41/SRteCKU8Wjb09YGhgbTbsYOTkkBEwk9k48ygphi0lcuLee rYuRi0NIYCmjxPI37xlhitq69jFDJBYxSpzceJIJJCEk0MYksWNnGYjNJqAjsf3bcbC4iICE xK/+q4wgDcwC+xklfu1tYQZJCAuESCz5doS9i5GDg0VAVeLiuQSQMK+Aq8Tq7m2sIGEJAQWJ OZNsQExOATeJSR0lEJtcJc7dWQR2m4TAInaJS2uXgt3GIiAg8W3yIRaIVlmJTQeYIU6WlDi4 4gbLBEbhBYwMqxhFUwuSC4qT0otM9YoTc4tL89L1kvNzNzECg/z0v2cTdzDeP2B9iDEZaNxE ZinR5HxglOSVxBsamxlZmJqYGhuZW5qRJqwkzpv+KClISCA9sSQ1OzW1ILUovqg0J7X4ECMT B6dUA+PCpA1BOTvXRN3wUVtwrcbrf6G0HdeqVLbLt7hMH0akXEuYInwvTGKCyLnW/oWx4jyz 38WZGnpzPbt7bfaHxE3psu4RcRN3fZ0jayV/c6nTzR730vx5JdpPk/uyuRNqIx0q28TPqBxS uOwy+2GN44zkHTcq+KJ8Io6c8DyjUlA14QH7vdRZU5VYijMSDbWYi4oTAfT9zdyIAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrEIsWRmVeSWpSXmKPExsVy+t9jAd2MxpJgg7b3ihanP21jt7jxq43V 4s3DzYwWHUdaGC3WPVnLarHr9mQWi7d7O9ktzl3axerA4THv50Qmj/5NHcweZ+/sYPTo27KK MYAlqoHRJiM1MSW1SCE1Lzk/JTMv3VbJOzjeOd7UzMBQ19DSwlxJIS8xN9VWycUnQNctMwfo ECWFssScUqBQQGJxsZK+HaYJoSFuuhYwjRG6viFBcD1GBmggYQ1jxr2mj6wFV5wqHn17wtLA 2GjaxcjJISFgItHWtY8ZwhaTuHBvPVsXIxeHkMAiRomTG08ygSSEBNqYJHbsLAOx2QR0JLZ/ Ow4WFxGQkPjVf5URpIFZYD+jxK+9LWCThAVCJJZ8O8LexcjBwSKgKnHxXAJImFfAVWJ19zZW kLCEgILEnEk2ICangJvEpI4SiE2uEufuLGKbwMi7gJFhFaNoakFyQXFSeq6RXnFibnFpXrpe cn7uJkZwDD2T3sG4qsHiEKMAB6MSDy/D5OJgIdbEsuLK3EOMEhzMSiK8++pLgoV4UxIrq1KL 8uOLSnNSiw8xJgOdNJFZSjQ5HxjfeSXxhsYmZkaWRuaGFkbG5qQJK4nzHmy1DhQSSE8sSc1O TS1ILYLZwsTBKdXAOKk2/vFh/o+PLjW+uXqmao2dvXXWRZMFiW++idn0t4mfl5U4O+f99bp0 v/Sf+yufWW/hbDtR8tpq+rqYc6mCuYnLFv/8lTPhb6xW2taZ+z794e+9vE1asTbBPurfoSu3 ytwsYtYn2S/wubrqWtOxdd8mV7m5HWGaX94rwN3CHbxYa96EGwtZupVYijMSDbWYi4oTAcwW WfHlAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: p.wilczek@samsung.com, panto@antoniou-consulting.com, Jaehoon Chung , vanbaren@cideas.com Subject: [U-Boot] [RESEND PATCHv4 07/14] mmc: exynos_dw_mmc: restore the property into host X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Restore the platdata(property of dt) into host struct. Then data's information is maintained and reused anywhere. Signed-off-by: Jaehoon Chung Tested-by: Lukasz Majewski Acked-by: Lukasz Majewski --- drivers/mmc/exynos_dw_mmc.c | 205 ++++++++++++++++++++++++++++--------------- include/dwmmc.h | 2 + 2 files changed, 135 insertions(+), 72 deletions(-) diff --git a/drivers/mmc/exynos_dw_mmc.c b/drivers/mmc/exynos_dw_mmc.c index de8cdcc..99047a7 100644 --- a/drivers/mmc/exynos_dw_mmc.c +++ b/drivers/mmc/exynos_dw_mmc.c @@ -13,6 +13,8 @@ #include #include #include +#include +#include #define DWMMC_MAX_CH_NUM 4 #define DWMMC_MAX_FREQ 52000000 @@ -44,6 +46,13 @@ unsigned int exynos_dwmci_get_clk(struct dwmci_host *host) & DWMCI_DIVRATIO_MASK) + 1; sclk = get_mmc_clk(host->dev_index); + /* + * Assume to know divider value. + * When clock unit is broken, need to set "host->div" + */ + if (host->div) + sclk /= (host->div + 1); + return sclk / clk_div; } @@ -60,45 +69,32 @@ static void exynos_dwmci_board_init(struct dwmci_host *host) } } -/* - * This function adds the mmc channel to be registered with mmc core. - * index - mmc channel number. - * regbase - register base address of mmc channel specified in 'index'. - * bus_width - operating bus width of mmc channel specified in 'index'. - * clksel - value to be written into CLKSEL register in case of FDT. - * NULL in case od non-FDT. - */ -int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) +static int exynos_dwmci_core_init(struct dwmci_host *host, int index) { - struct dwmci_host *host = NULL; unsigned int div; unsigned long freq, sclk; - host = malloc(sizeof(struct dwmci_host)); - if (!host) { - printf("dwmci_host malloc fail!\n"); - return 1; - } + + if (host->bus_hz) + freq = host->bus_hz; + else + freq = DWMMC_MAX_FREQ; + /* request mmc clock vlaue of 52MHz. */ - freq = 52000000; sclk = get_mmc_clk(index); div = DIV_ROUND_UP(sclk, freq); /* set the clock divisor for mmc */ set_mmc_clk(index, div); host->name = "EXYNOS DWMMC"; - host->ioaddr = (void *)regbase; - host->buswidth = bus_width; #ifdef CONFIG_EXYNOS5420 host->quirks = DWMCI_QUIRK_DISABLE_SMU; #endif host->board_init = exynos_dwmci_board_init; - if (clksel) { - host->clksel_val = clksel; - } else { - if (0 == index) + if (!host->clksel_val) { + if (index == 0) host->clksel_val = DWMMC_MMC0_CLKSEL_VAL; - if (2 == index) + if (index == 2) host->clksel_val = DWMMC_MMC2_CLKSEL_VAL; } @@ -113,69 +109,134 @@ int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) return 0; } +/* + * This function adds the mmc channel to be registered with mmc core. + * index - mmc channel number. + * regbase - register base address of mmc channel specified in 'index'. + * bus_width - operating bus width of mmc channel specified in 'index'. + * clksel - value to be written into CLKSEL register in case of FDT. + * NULL in case od non-FDT. + */ +int exynos_dwmci_add_port(int index, u32 regbase, int bus_width, u32 clksel) +{ + struct dwmci_host *host = NULL; + + host = malloc(sizeof(struct dwmci_host)); + if (!host) { + error("dwmci_host malloc fail!\n"); + return -ENOMEM; + } + + host->ioaddr = (void *)regbase; + host->buswidth = bus_width; + + if (clksel) + host->clksel_val = clksel; + + return exynos_dwmci_core_init(host, index); +} + #ifdef CONFIG_OF_CONTROL -int exynos_dwmmc_init(const void *blob) +struct dwmci_host dwmci_host[DWMMC_MAX_CH_NUM]; + +static int do_dwmci_init(struct dwmci_host *host) { - int index, bus_width; - int node_list[DWMMC_MAX_CH_NUM]; - int err = 0, dev_id, flag, count, i; - u32 clksel_val, base, timing[3]; + int index, flag = 0, err = 0; - count = fdtdec_find_aliases_for_id(blob, "mmc", - COMPAT_SAMSUNG_EXYNOS5_DWMMC, node_list, - DWMMC_MAX_CH_NUM); + index = host->dev_index; - for (i = 0; i < count; i++) { - int node = node_list[i]; + flag = host->buswidth == 8 ? PINMUX_FLAG_8BIT_MODE : PINMUX_FLAG_NONE; + err = exynos_pinmux_config(host->dev_id, flag); + if (err) { + debug("DWMMC not configure\n"); + return err; + } - if (node <= 0) - continue; + return exynos_dwmci_core_init(host, index); +} - /* Extract device id for each mmc channel */ - dev_id = pinmux_decode_periph_id(blob, node); +static int exynos_dwmci_get_config(const void *blob, int node, + struct dwmci_host *host) +{ + int err = 0; + u32 base, clksel_val, timing[3]; - /* Get the bus width from the device node */ - bus_width = fdtdec_get_int(blob, node, "samsung,bus-width", 0); - if (bus_width <= 0) { - debug("DWMMC: Can't get bus-width\n"); - return -1; - } - if (8 == bus_width) - flag = PINMUX_FLAG_8BIT_MODE; - else - flag = PINMUX_FLAG_NONE; + /* Extract device id for each mmc channel */ + host->dev_id = pinmux_decode_periph_id(blob, node); - /* config pinmux for each mmc channel */ - err = exynos_pinmux_config(dev_id, flag); - if (err) { - debug("DWMMC not configured\n"); - return err; - } + /* Get the bus width from the device node */ + host->buswidth = fdtdec_get_int(blob, node, "samsung,bus-width", 0); + if (host->buswidth <= 0) { + debug("DWMMC: Can't get bus-width\n"); + return -EINVAL; + } - index = dev_id - PERIPH_ID_SDMMC0; + host->dev_index = fdtdec_get_int(blob, node, "index", host->dev_id); + if (host->dev_index == host->dev_id) + host->dev_index = host->dev_id - PERIPH_ID_SDMMC0; - /* Get the base address from the device node */ - base = fdtdec_get_addr(blob, node, "reg"); - if (!base) { - debug("DWMMC: Can't get base address\n"); - return -1; - } - /* Extract the timing info from the node */ - err = fdtdec_get_int_array(blob, node, "samsung,timing", - timing, 3); + /* Set the base address from the device node */ + base = fdtdec_get_addr(blob, node, "reg"); + if (!base) { + debug("DWMMC: Can't get base address\n"); + return -EINVAL; + } + host->ioaddr = (void *)base; + + /* Extract the timing info from the node */ + err = fdtdec_get_int_array(blob, node, "samsung,timing", timing, 3); + if (err) { + debug("Can't get sdr-timings for devider\n"); + return -EINVAL; + } + + clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) | + DWMCI_SET_DRV_CLK(timing[1]) | + DWMCI_SET_DIV_RATIO(timing[2])); + if (clksel_val) + host->clksel_val = clksel_val; + + host->fifoth_val = fdtdec_get_int(blob, node, "fifoth_val", 0); + host->bus_hz = fdtdec_get_int(blob, node, "bus_hz", 0); + host->div = fdtdec_get_int(blob, node, "div", 0); + + return 0; +} + +static int exynos_dwmci_process_node(const void *blob, + int node_list[], int count) +{ + struct dwmci_host *host; + int i, node, err; + + for (i = 0; i < count; i++) { + node = node_list[i]; + if (node <= 0) + continue; + host = &dwmci_host[i]; + err = exynos_dwmci_get_config(blob, node, host); if (err) { - debug("Can't get sdr-timings for divider\n"); - return -1; + debug("%s: failed to decode dev %d\n", __func__, i); + return err; } - clksel_val = (DWMCI_SET_SAMPLE_CLK(timing[0]) | - DWMCI_SET_DRV_CLK(timing[1]) | - DWMCI_SET_DIV_RATIO(timing[2])); - /* Initialise each mmc channel */ - err = exynos_dwmci_add_port(index, base, bus_width, clksel_val); - if (err) - debug("dwmmc Channel-%d init failed\n", index); + do_dwmci_init(host); } return 0; } + +int exynos_dwmmc_init(const void *blob) +{ + int compat_id; + int node_list[DWMMC_MAX_CH_NUM]; + int err = 0, count; + + compat_id = COMPAT_SAMSUNG_EXYNOS_DWMMC; + + count = fdtdec_find_aliases_for_id(blob, "mmc", + compat_id, node_list, DWMMC_MAX_CH_NUM); + err = exynos_dwmci_process_node(blob, node_list, count); + + return err; +} #endif diff --git a/include/dwmmc.h b/include/dwmmc.h index c9bdf51..14c7db8 100644 --- a/include/dwmmc.h +++ b/include/dwmmc.h @@ -134,7 +134,9 @@ struct dwmci_host { unsigned int version; unsigned int clock; unsigned int bus_hz; + unsigned int div; int dev_index; + int dev_id; int buswidth; u32 clksel_val; u32 fifoth_val;