From patchwork Wed May 7 13:16:35 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nikhil Badola X-Patchwork-Id: 346659 X-Patchwork-Delegate: wd@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (unknown [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 55C82140195 for ; Wed, 7 May 2014 23:31:34 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 87FC14B58F; Wed, 7 May 2014 15:31:32 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 0V58vjPi74bA; Wed, 7 May 2014 15:31:32 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 5935C4B5D5; Wed, 7 May 2014 15:31:30 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A55364B5D5 for ; Wed, 7 May 2014 15:31:25 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id tGounhdG0Zwp for ; Wed, 7 May 2014 15:31:22 +0200 (CEST) X-Greylist: delayed 865 seconds by postgrey-1.27 at theia; Wed, 07 May 2014 15:31:18 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from na01-by2-obe.outbound.protection.outlook.com (mail-by2lp0240.outbound.protection.outlook.com [207.46.163.240]) by theia.denx.de (Postfix) with ESMTPS id 269D54B58F for ; Wed, 7 May 2014 15:31:18 +0200 (CEST) Received: from BLUPR03CA028.namprd03.prod.outlook.com (10.141.30.21) by BLUPR03MB168.namprd03.prod.outlook.com (10.255.212.152) with Microsoft SMTP Server (TLS) id 15.0.934.12; Wed, 7 May 2014 13:16:50 +0000 Received: from BY2FFO11FD002.protection.gbl (2a01:111:f400:7c0c::109) by BLUPR03CA028.outlook.office365.com (2a01:111:e400:879::21) with Microsoft SMTP Server (TLS) id 15.0.934.12 via Frontend Transport; Wed, 7 May 2014 13:16:50 +0000 Received: from az84smr01.freescale.net (192.88.158.2) by BY2FFO11FD002.mail.protection.outlook.com (10.1.14.124) with Microsoft SMTP Server (TLS) id 15.0.929.8 via Frontend Transport; Wed, 7 May 2014 13:16:50 +0000 Received: from localhost.ap.freescale.net (udp166030uds.ap.freescale.net [10.232.132.65]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id s47DGj3H007348; Wed, 7 May 2014 06:16:48 -0700 From: Nikhil Badola To: Date: Wed, 7 May 2014 18:46:35 +0530 Message-ID: <1399468595-953-1-git-send-email-nikhil.badola@freescale.com> X-Mailer: git-send-email 1.7.11.7 X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:192.88.158.2; CTRY:US; IPV:NLI; EFV:NLI; SFV:NSPM; SFS:(10009001)(6009001)(43544003)(189002)(199002)(81342001)(93916002)(86362001)(6806004)(33646001)(85852003)(77156001)(83072002)(21056001)(81542001)(48376002)(77982001)(92566001)(50226001)(4396001)(92726001)(19580395003)(44976005)(83322001)(19580405001)(68736004)(69596002)(99396002)(84676001)(46102001)(81156002)(50466002)(87936001)(62966002)(36756003)(89996001)(50986999)(77096999)(79102001)(47776003)(20776003)(2009001)(31966008)(64706001)(74502001)(87286001)(74662001)(76482001)(88136002)(97736001)(80022001); DIR:OUT; SFP:1101; SCL:1; SRVR:BLUPR03MB168; H:az84smr01.freescale.net; FPR:; MLV:sfv; PTR:InfoDomainNonexistent; MX:1; A:1; LANG:en; MIME-Version: 1.0 X-Forefront-PRVS: 0204F0BDE2 Received-SPF: Fail (: domain of freescale.com does not designate 192.88.158.2 as permitted sender) receiver=; client-ip=192.88.158.2; helo=az84smr01.freescale.net; Authentication-Results: spf=fail (sender IP is 192.88.158.2) smtp.mailfrom=nikhil.badola@freescale.com; X-OriginatorOrg: freescale.com Cc: Ramneek Mehresh Subject: [U-Boot] [PATCH] drivers/usb : Introduce APIs for fsl usb registers X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Introduce new APIs to write fsl usb registers that have w1c bits. Existing API framework do not take care of w1c bits Signed-off-by: Nikhil Badola Signed-off-by: Ramneek Mehresh --- drivers/usb/host/ehci-fsl.c | 17 ++++++++++++----- include/usb/ehci-fsl.h | 6 ++++++ 2 files changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c index 6cb4d98..3be69c4 100644 --- a/drivers/usb/host/ehci-fsl.c +++ b/drivers/usb/host/ehci-fsl.c @@ -104,15 +104,22 @@ int ehci_hcd_init(int index, enum usb_init_type init, if (!strncmp(phy_type, "utmi", 4)) { #if defined(CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY) - setbits_be32(&ehci->control, PHY_CLK_SEL_UTMI); - setbits_be32(&ehci->control, UTMI_PHY_EN); + fsl_usb_setbits(&ehci->control, PHY_CLK_SEL_UTMI, + CONTROL_REGISTER_W1C_MASK); + fsl_usb_setbits(&ehci->control, UTMI_PHY_EN, + CONTROL_REGISTER_W1C_MASK); udelay(1000); /* delay required for PHY Clk to appear */ #endif out_le32(&(*hcor)->or_portsc[0], PORT_PTS_UTMI); - setbits_be32(&ehci->control, USB_EN); + fsl_usb_setbits(&ehci->control, USB_EN, + CONTROL_REGISTER_W1C_MASK); } else { - setbits_be32(&ehci->control, PHY_CLK_SEL_ULPI); - clrsetbits_be32(&ehci->control, UTMI_PHY_EN, USB_EN); + fsl_usb_setbits(&ehci->control, PHY_CLK_SEL_ULPI, + CONTROL_REGISTER_W1C_MASK); + fsl_usb_clrbits(&ehci->control, UTMI_PHY_EN, + CONTROL_REGISTER_W1C_MASK); + fsl_usb_setbits(&ehci->control, USB_EN, + CONTROL_REGISTER_W1C_MASK); udelay(1000); /* delay required for PHY Clk to appear */ if (!usb_phy_clk_valid(ehci)) return -EINVAL; diff --git a/include/usb/ehci-fsl.h b/include/usb/ehci-fsl.h index c9ee1d5..fb3d6b4 100644 --- a/include/usb/ehci-fsl.h +++ b/include/usb/ehci-fsl.h @@ -11,6 +11,12 @@ #include +#define CONTROL_REGISTER_W1C_MASK 0x00020000 /* W1C: PHY_CLK_VALID */ +#define fsl_usb_setbits(_addr, _v, _mask) out_be32((_addr), \ + ((in_be32(_addr) & ~_mask) | _v)) +#define fsl_usb_clrbits(_addr, _v, _mask) out_be32((_addr), \ + ((in_be32(_addr) & ~_mask) & ~_v)) + /* Global offsets */ #define FSL_SKIP_PCI 0x100