diff mbox series

[u-boot,v2,2/2] eth/r8152: fix typo in register name

Message ID 1394712342-15778-374-Taiwan-albertk@realtek.com
State Accepted
Commit 2cff87f7abf060dda00302680f051d5e9ce60ab9
Delegated to: Marek Vasut
Headers show
Series eth/r8152: minor corrections | expand

Commit Message

Hayes Wang May 25, 2020, 7:47 a.m. UTC 
The PAL_BDC_CR should be PLA_BDC_CR.

Signed-off-by: Hayes Wang <hayeswang@realtek.com>
---
 drivers/usb/eth/r8152.c | 8 ++++----
 drivers/usb/eth/r8152.h | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/drivers/usb/eth/r8152.c b/drivers/usb/eth/r8152.c
index 9f7bc7986d..cef79cab49 100644
--- a/drivers/usb/eth/r8152.c
+++ b/drivers/usb/eth/r8152.c
@@ -711,9 +711,9 @@  static void r8152b_enter_oob(struct r8152 *tp)
 
 	rtl_rx_vlan_en(tp, false);
 
-	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
+	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_BDC_CR);
 	ocp_data |= ALDPS_PROXY_MODE;
-	ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
+	ocp_write_word(tp, MCU_TYPE_PLA, PLA_BDC_CR, ocp_data);
 
 	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
 	ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
@@ -844,9 +844,9 @@  static void r8153_enter_oob(struct r8152 *tp)
 
 	rtl_rx_vlan_en(tp, false);
 
-	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
+	ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_BDC_CR);
 	ocp_data |= ALDPS_PROXY_MODE;
-	ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
+	ocp_write_word(tp, MCU_TYPE_PLA, PLA_BDC_CR, ocp_data);
 
 	ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
 	ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
diff --git a/drivers/usb/eth/r8152.h b/drivers/usb/eth/r8152.h
index 09f1c6178b..c7f62b8b3e 100644
--- a/drivers/usb/eth/r8152.h
+++ b/drivers/usb/eth/r8152.h
@@ -22,7 +22,7 @@ 
 #define PLA_TEREDO_CFG		0xc0bc
 #define PLA_MAR			0xcd00
 #define PLA_BACKUP		0xd000
-#define PAL_BDC_CR		0xd1a0
+#define PLA_BDC_CR		0xd1a0
 #define PLA_TEREDO_TIMER	0xd2cc
 #define PLA_REALWOW_TIMER	0xd2e8
 #define PLA_LEDSEL		0xdd90
@@ -225,7 +225,7 @@ 
 #define TEREDO_RS_EVENT_MASK	0x00fe
 #define OOB_TEREDO_EN		0x0001
 
-/* PAL_BDC_CR */
+/* PLA_BDC_CR */
 #define ALDPS_PROXY_MODE	0x0001
 
 /* PLA_CONFIG34 */