From patchwork Tue Jan 14 11:55:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 310569 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id A95292C008F for ; Tue, 14 Jan 2014 22:56:29 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6DFEB4AF7A; Tue, 14 Jan 2014 12:56:26 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 41w4JSyLQiwr; Tue, 14 Jan 2014 12:56:26 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AC4FE4AF58; Tue, 14 Jan 2014 12:56:23 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A71B04AF58 for ; Tue, 14 Jan 2014 12:56:16 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id tWu-ZPA8o25Y for ; Tue, 14 Jan 2014 12:56:10 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-yh0-f53.google.com (mail-yh0-f53.google.com [209.85.213.53]) by theia.denx.de (Postfix) with ESMTPS id 340A34AF57 for ; Tue, 14 Jan 2014 12:56:04 +0100 (CET) Received: by mail-yh0-f53.google.com with SMTP id z20so71004yhz.40 for ; Tue, 14 Jan 2014 03:56:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=oTInQvoWEVajhQ57kcNDet+/QDhiqV4LvU+8cLpuegc=; b=0Ndn8aviaHMH/4/J5M4wVgMQvAsgaW4ZFm00xrz8vrws3hrEKKKzo/HWojWNe7cCug xvoN9hacx6X6gQEo8Qh+R75DfcvRcpkrX1IwjUHfQaO86m37UnPARaMHEAQnRsBoSSOZ b72hLeeHAVvw5lb122o4773lnb7r7KjmEJ5PqTmMrXaSUhjulTQgPGYDjFZwKQzWjp8i wgDmLkasR0ddWwz08coWajZxWDMsGuonfH8wUPrBeIiFAnEm9ju0XfDUgds+ztbxo00p WeiLlZYFO4KICjsQY3EtG7DsEniDUovVumE+Dyzxew1glqVesZt/XWC0u8aWj0o2sgyx IXDg== X-Received: by 10.236.118.201 with SMTP id l49mr1238664yhh.78.1389700563282; Tue, 14 Jan 2014 03:56:03 -0800 (PST) Received: from localhost.localdomain ([177.194.40.80]) by mx.google.com with ESMTPSA id 48sm603647yhq.11.2014.01.14.03.56.01 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Tue, 14 Jan 2014 03:56:02 -0800 (PST) From: Fabio Estevam To: sbabic@denx.de Date: Tue, 14 Jan 2014 09:55:38 -0200 Message-Id: <1389700538-32058-1-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 1.8.1.2 Cc: Fabio Estevam , otavio@ossystems.com.br, u-boot@lists.denx.de Subject: [U-Boot] [PATCH] mx6: Distinguish mx6dual from mx6quad X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Fabio Estevam Currently when we boot a mx6dual U-boot reports that it is a mx6quad. Report it as MX6D instead: CPU: Freescale i.MX6D rev1.2 at 792 MHz Signed-off-by: Fabio Estevam Tested-by: Otavio Salvador --- arch/arm/cpu/armv7/mx6/soc.c | 14 +++++++++++--- arch/arm/imx-common/cpu.c | 2 ++ arch/arm/include/asm/arch-mx6/sys_proto.h | 1 + 3 files changed, 14 insertions(+), 3 deletions(-) diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 009a644..a6fb6ab 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -43,14 +43,19 @@ u32 get_cpu_rev(void) if (type != MXC_CPU_MX6SL) { reg = readl(&anatop->digprog); + struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR; + u32 cfg = readl(&scu->config) & 3; type = ((reg >> 16) & 0xff); if (type == MXC_CPU_MX6DL) { - struct scu_regs *scu = (struct scu_regs *)SCU_BASE_ADDR; - u32 cfg = readl(&scu->config) & 3; - if (!cfg) type = MXC_CPU_MX6SOLO; } + + if (type == MXC_CPU_MX6Q) { + if (cfg == 1) + type = MXC_CPU_MX6D; + } + } reg &= 0xff; /* mx6 silicon revision */ return (type << 12) | (reg + 0x10); @@ -64,6 +69,9 @@ u32 __weak get_board_rev(void) if (type == MXC_CPU_MX6SOLO) cpurev = (MXC_CPU_MX6DL) << 12 | (cpurev & 0xFFF); + if (type == MXC_CPU_MX6D) + cpurev = (MXC_CPU_MX6Q) << 12 | (cpurev & 0xFFF); + return cpurev; } #endif diff --git a/arch/arm/imx-common/cpu.c b/arch/arm/imx-common/cpu.c index 9231649..a77c4de 100644 --- a/arch/arm/imx-common/cpu.c +++ b/arch/arm/imx-common/cpu.c @@ -106,6 +106,8 @@ const char *get_imx_type(u32 imxtype) switch (imxtype) { case MXC_CPU_MX6Q: return "6Q"; /* Quad-core version of the mx6 */ + case MXC_CPU_MX6D: + return "6D"; /* Dual-core version of the mx6 */ case MXC_CPU_MX6DL: return "6DL"; /* Dual Lite version of the mx6 */ case MXC_CPU_MX6SOLO: diff --git a/arch/arm/include/asm/arch-mx6/sys_proto.h b/arch/arm/include/asm/arch-mx6/sys_proto.h index 17125a6..eda779e 100644 --- a/arch/arm/include/asm/arch-mx6/sys_proto.h +++ b/arch/arm/include/asm/arch-mx6/sys_proto.h @@ -16,6 +16,7 @@ #define MXC_CPU_MX6DL 0x61 #define MXC_CPU_MX6SOLO 0x62 #define MXC_CPU_MX6Q 0x63 +#define MXC_CPU_MX6D 0x64 #define is_soc_rev(rev) ((get_cpu_rev() & 0xFF) - rev) u32 get_cpu_rev(void);