| Message ID | 1389587917-10324-1-git-send-email-prabhakar@freescale.com |
|---|---|
| State | Superseded |
| Delegated to: | York Sun |
| Headers | show |
Dear Prabhakar Kushwaha, In message <1389587917-10324-1-git-send-email-prabhakar@freescale.com> you wrote: > Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG. What is the reason for the reenaming? Especially, why changing from CONFIG_ to CONFIG_SYS_ ? > Also add their details in README. ... > + CONFIG_SYS_FSL_PBL_PBI > + CONFIG_SYS_FSL_PBL_RCW > + Provides a tool to build boot Image for PBL(Pre boot loader) > + Here PBL can be used to load some instructions and/or data for > + pre-initialization. > + Define both configs to enable above feature. Hm...This does not really explain what CONFIG_SYS_FSL_PBL_PBI or CONFIG_SYS_FSL_PBL_RCW actually means. Best regards, Wolfgang Denk
Thanks Wolfgang for reviewing this patch. Please find my reply in-lined On 1/13/2014 11:02 AM, Wolfgang Denk wrote: > Dear Prabhakar Kushwaha, > > In message <1389587917-10324-1-git-send-email-prabhakar@freescale.com> you wrote: >> Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG. > What is the reason for the reenaming? Especially, why changing from > CONFIG_ to CONFIG_SYS_ ? CONFIG_PBLRCW_CONFIG has 2 CONFIG. it is slightly confusing. Reason for moving CONFIG_ to CONFIG_SYS: These defines enables of adding RCW(power on reset configuration) and PBI(pre boot loader commands) in u-boot image. These information will be used by SoC hardware for NAND, SD, SPI boot. As these configuration will be used by SoC hardware. I thought of adding CONFIG_SYS. Please let me know, if I need to rename it again. >> Also add their details in README. > ... > >> + CONFIG_SYS_FSL_PBL_PBI >> + CONFIG_SYS_FSL_PBL_RCW >> + Provides a tool to build boot Image for PBL(Pre boot loader) >> + Here PBL can be used to load some instructions and/or data for >> + pre-initialization. >> + Define both configs to enable above feature. > Hm...This does not really explain what CONFIG_SYS_FSL_PBL_PBI or > CONFIG_SYS_FSL_PBL_RCW actually means. > > You are right. Let me correct it. Thanks, Prabhakar
Dear Prabhakar, In message <52D37CF5.2090100@freescale.com> you wrote: > > > What is the reason for the reenaming? Especially, why changing from > > CONFIG_ to CONFIG_SYS_ ? > > CONFIG_PBLRCW_CONFIG has 2 CONFIG. it is slightly confusing. > > Reason for moving CONFIG_ to CONFIG_SYS: These defines enables of > adding RCW(power on reset configuration) and > PBI(pre boot loader commands) in u-boot image. These information will be > used by SoC hardware for NAND, SD, SPI boot. > As these configuration will be used by SoC hardware. I thought of adding > CONFIG_SYS. CONFIG_ means stuff that can be freely adjusted by the end user to match his likings, like adding one command and removing another. CONFIG_SYS_ means stuff that is determined by the hardware configuration, i. e. that has to be adjusted according to specific properties to make U-Boot working on some hardware, and which can (or should) not be "adjusted" by the end user. I don;t understand your intentions enough to say which applies here; IIRC at least PBI might be more of the CONFIG_ type. Best regards, Wolfgang Denk
On Mon, 2014-01-13 at 14:48 +0100, Wolfgang Denk wrote: > Dear Prabhakar, > > In message <52D37CF5.2090100@freescale.com> you wrote: > > > > > What is the reason for the reenaming? Especially, why changing from > > > CONFIG_ to CONFIG_SYS_ ? > > > > CONFIG_PBLRCW_CONFIG has 2 CONFIG. it is slightly confusing. > > > > Reason for moving CONFIG_ to CONFIG_SYS: These defines enables of > > adding RCW(power on reset configuration) and > > PBI(pre boot loader commands) in u-boot image. These information will be > > used by SoC hardware for NAND, SD, SPI boot. > > As these configuration will be used by SoC hardware. I thought of adding > > CONFIG_SYS. > > CONFIG_ means stuff that can be freely adjusted by the end user to > match his likings, like adding one command and removing another. > CONFIG_SYS_ means stuff that is determined by the hardware > configuration, i. e. that has to be adjusted according to specific > properties to make U-Boot working on some hardware, and which can (or > should) not be "adjusted" by the end user. > > I don;t understand your intentions enough to say which applies here; > IIRC at least PBI might be more of the CONFIG_ type. I think they belong in CONFIG_SYS -- they can be adjusted to some extent if you know what you're doing, but they are not general user knobs. As far as end users are concerned, they should use the PBI/PBL files that match their hardware. The PBI file will mainly contain errata workarounds, and/or hardware initialization necessary for certain types of non-NOR booting (the user knob in the latter case is elsewhere, to tell U-Boot what boot source to target). -Scott
diff --git a/Makefile b/Makefile index e6f6edb..beee7ec 100644 --- a/Makefile +++ b/Makefile @@ -419,8 +419,8 @@ $(obj)u-boot.kwb: $(obj)u-boot.bin -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE) -d $< $@ $(obj)u-boot.pbl: $(obj)u-boot.bin - $(obj)tools/mkimage -n $(CONFIG_PBLRCW_CONFIG) \ - -R $(CONFIG_PBLPBI_CONFIG) -T pblimage \ + $(obj)tools/mkimage -n $(CONFIG_SYS_FSL_PBL_RCW) \ + -R $(CONFIG_SYS_FSL_PBL_PBI) -T pblimage \ -d $< $@ $(obj)u-boot.sha1: $(obj)u-boot.bin diff --git a/README b/README index a0646c3..bc481b9 100644 --- a/README +++ b/README @@ -472,6 +472,13 @@ The following options need to be configured: Board config to use DDR3. It can be enabled for SoCs with Freescale DDR3 controllers. + CONFIG_SYS_FSL_PBL_PBI + CONFIG_SYS_FSL_PBL_RCW + Provides a tool to build boot Image for PBL(Pre boot loader) + Here PBL can be used to load some instructions and/or data for + pre-initialization. + Define both configs to enable above feature. + - Intel Monahans options: CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index c182158..c667229 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -16,8 +16,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/b4860qds/b4_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/b4860qds/b4_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/b4860qds/b4_rcw.cfg #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index ee71252..2b81cbe 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -18,8 +18,9 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p2041rdb.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW \ + $(SRCTREE)/board/freescale/corenet_ds/rcw_p2041rdb.cfg #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h index 7d0bc04..74d8049 100644 --- a/include/configs/T1040QDS.h +++ b/include/configs/T1040QDS.h @@ -32,8 +32,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/t1040qds/t1040_pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/t1040qds/t1040_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t1040qds/t1040_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t1040qds/t1040_rcw.cfg #endif /* High Level Configuration Options */ diff --git a/include/configs/T2080QDS.h b/include/configs/T2080QDS.h index bff001f..b35e107 100644 --- a/include/configs/T2080QDS.h +++ b/include/configs/T2080QDS.h @@ -45,8 +45,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/t2080qds/t2080_pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/t2080qds/t2080_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t2080qds/t2080_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t2080qds/t2080_rcw.cfg #endif #define CONFIG_SRIO_PCIE_BOOT_MASTER diff --git a/include/configs/T4240QDS.h b/include/configs/T4240QDS.h index c96df54..1f1177b 100644 --- a/include/configs/T4240QDS.h +++ b/include/configs/T4240QDS.h @@ -21,8 +21,8 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/t4qds/t4_pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/t4qds/t4_rcw.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t4qds/t4_pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t4qds/t4_rcw.cfg #endif #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index 969b990..3a1826d 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -15,15 +15,19 @@ #ifdef CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg #if defined(CONFIG_P3041DS) -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p3041ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW \ + $(SRCTREE)/board/freescale/corenet_ds/rcw_p3041ds.cfg #elif defined(CONFIG_P4080DS) -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p4080ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW \ + $(SRCTREE)/board/freescale/corenet_ds/rcw_p4080ds.cfg #elif defined(CONFIG_P5020DS) -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p5020ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW \ + $(SRCTREE)/board/freescale/corenet_ds/rcw_p5020ds.cfg #elif defined(CONFIG_P5040DS) -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/freescale/corenet_ds/rcw_p5040ds.cfg +#define CONFIG_SYS_FSL_PBL_RCW \ + $(SRCTREE)/board/freescale/corenet_ds/rcw_p5040ds.cfg #endif #endif diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h index 50330cc..0463fcb 100644 --- a/include/configs/km/kmp204x-common.h +++ b/include/configs/km/kmp204x-common.h @@ -24,8 +24,8 @@ #define CONFIG_RAMBOOT_PBL #define CONFIG_RAMBOOT_TEXT_BASE CONFIG_SYS_TEXT_BASE #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc -#define CONFIG_PBLPBI_CONFIG $(SRCTREE)/board/keymile/kmp204x/pbi.cfg -#define CONFIG_PBLRCW_CONFIG $(SRCTREE)/board/keymile/kmp204x/rcw_kmp204x.cfg +#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/keymile/kmp204x/pbi.cfg +#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/keymile/kmp204x/rcw_kmp204x.cfg /* High Level Configuration Options */ #define CONFIG_BOOKE
Rename CONFIG_PBLRCW_CONFIG and CONFIG_PBLRCW_CONFIG. Also add their details in README. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> --- Makefile | 4 ++-- README | 7 +++++++ include/configs/B4860QDS.h | 4 ++-- include/configs/P2041RDB.h | 5 +++-- include/configs/T1040QDS.h | 4 ++-- include/configs/T2080QDS.h | 4 ++-- include/configs/T4240QDS.h | 4 ++-- include/configs/corenet_ds.h | 14 +++++++++----- include/configs/km/kmp204x-common.h | 4 ++-- 9 files changed, 31 insertions(+), 19 deletions(-)