From patchwork Wed Jan 8 01:32:23 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 307938 X-Patchwork-Delegate: iwamatsu@nigauri.org Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id B11E92C00C4 for ; Wed, 8 Jan 2014 12:33:17 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AC3844ABA0; Wed, 8 Jan 2014 02:33:11 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7RxbsDzE1fO6; Wed, 8 Jan 2014 02:33:11 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B21374ABA1; Wed, 8 Jan 2014 02:32:59 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 746DB4AB6B for ; Wed, 8 Jan 2014 02:32:52 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 4xz8fNLZlc9A for ; Wed, 8 Jan 2014 02:32:47 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 BL_NJABL=SKIP(-1.5) (only DNSBL check requested) Received: from mail-pb0-f44.google.com (mail-pb0-f44.google.com [209.85.160.44]) by theia.denx.de (Postfix) with ESMTPS id D8C984AB57 for ; Wed, 8 Jan 2014 02:32:43 +0100 (CET) Received: by mail-pb0-f44.google.com with SMTP id rq2so890142pbb.17 for ; Tue, 07 Jan 2014 17:32:41 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=KtBCrLmTu9Y30v5aDJJMMeaW2or9CaAOD7He7EF9ru8=; b=FpJo1YfCJ/iQjbfxWVdK4AzZJZXEoC3BpFTpgvMQGNdm2P+jmhQ7XUBrl3uXLaIUtj b3IVA1XgUcJjGYIAl3+NIzXG1YFw3Vb3Ap+lF/O7ydFqLnnuZgKIWdBPdR7F1KNs/gcq c1IXGyH8CK2eDpwFwTdXiINhtmwan3gX4WY3as5C6TkVgbr5O6dgtwIPGn+RdSeNInE8 wqfhgfOLz3wsYemoOektOerss1w6QnTUDa06U4KXDQN5dlyUsgPNexDrgU1o6MQpf12D +yGZEY4sJprLso2Q861sqood5I6/gyUFLOlKK3KKiGS8hgtKJik3GznnvgT1ag5y6g+e x2Yg== X-Gm-Message-State: ALoCoQn3/Nx2FSwH4EGkwbdqCiECwCIS6s1xwyIzrpwctk/QykBIujRQ5c3aHbRBEvSxyVtx/z/B X-Received: by 10.68.89.162 with SMTP id bp2mr19186176pbb.151.1389144761736; Tue, 07 Jan 2014 17:32:41 -0800 (PST) Received: from xps-iwamatsu.renesas.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id gv10sm139091505pbd.0.2014.01.07.17.32.39 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 07 Jan 2014 17:32:40 -0800 (PST) From: Nobuhiro Iwamatsu To: u-boot@lists.denx.de Date: Wed, 8 Jan 2014 10:32:23 +0900 Message-Id: <1389144744-6578-3-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Mailer: git-send-email 1.8.5 In-Reply-To: <1389144744-6578-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> References: <1389144744-6578-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> Cc: Nobuhiro Iwamatsu Subject: [U-Boot] [PATCH v2 3/4] arm: koelsch: Disable TMU0 before OS boots X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de On U-boot uses TMU0 as timer, but TMU0 does not use on linux kernel and other. This disables TMU0 at the request of from kernel user. Signed-off-by: Nobuhiro Iwamatsu Signed-off-by: Nobuhiro Iwamatsu --- v2: no changes. board/renesas/koelsch/koelsch.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/board/renesas/koelsch/koelsch.c b/board/renesas/koelsch/koelsch.c index 89f5c91..32d3b58 100644 --- a/board/renesas/koelsch/koelsch.c +++ b/board/renesas/koelsch/koelsch.c @@ -253,6 +253,12 @@ int board_early_init_f(void) return 0; } +void arch_preboot_os(void) +{ + /* Disable TMU0 */ + mstp_setbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); +} + /* LSI pin pull-up control */ #define PUPR5 0xe6060114 #define PUPR5_ETH 0x3FFC0000