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Mon, 02 Dec 2013 20:46:00 +0900 (KST) X-AuditID: cbfee68e-b7f7e6d00000477d-1f-529c72f718c1 Received: from epmmp2 ( [203.254.227.17]) by epcpsbgm1.samsung.com (EPCPMTA) with SMTP id F7.C4.32308.7F27C925; Mon, 02 Dec 2013 20:45:59 +0900 (KST) Received: from localhost.localdomain.com ([107.108.73.95]) by mmp2.samsung.com (Oracle Communications Messaging Server 7u4-24.01 (7.0.4.24.0) 64bit (built Nov 17 2011)) with ESMTPA id <0MX600DAVGOFNY80@mmp2.samsung.com>; Mon, 02 Dec 2013 20:45:59 +0900 (KST) From: Rajeshwari S Shinde To: u-boot@lists.denx.de Date: Mon, 02 Dec 2013 17:17:31 +0530 Message-id: <1385984858-30816-3-git-send-email-rajeshwari.s@samsung.com> X-Mailer: git-send-email 1.7.11.7 In-reply-to: <1385984858-30816-1-git-send-email-rajeshwari.s@samsung.com> References: <1385984858-30816-1-git-send-email-rajeshwari.s@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrPLMWRmVeSWpSXmKPExsWyRsSkTvdH0Zwggz8TWC0ezNvGZvFw/U0W i44jLYwWUw5/YbH4tmUbo8XkxfOZLZa/3shu8XZvJ7sDh8fshossHgs2lXrcubaHzePsnR2M Hn1bVjF6HL+xnSmALYrLJiU1J7MstUjfLoErY0nbM6aCOfIVG29sYGpgPCHVxcjJISFgIvH/ 3wFmCFtM4sK99WxdjFwcQgJLGSW+XJrCAlP0fdF6VojEdEaJtp/dUE4Xk8SiGWeAHA4ONqCq jScSQBpEBCQkfvVfZQSpYRaYzyix/PdusBXCAvYSZ3avYwWxWQRUJb73XWIE6eUV8JB4fNMD YpmixIwlzxhBbE4BT4lpjzewgJQIAZU8fOgNMlJCYBW7xIqeP1BjBCS+TT4EViMhICuxCeYZ SYmDK26wTGAUXsDIsIpRNLUguaA4Kb3ISK84Mbe4NC9dLzk/dxMjMPBP/3vWt4Px5gHrQ4zJ QOMmMkuJJucDIyevJN7Q2MzIwtTE1NjI3NKMNGElcd5FD5OChATSE0tSs1NTC1KL4otKc1KL DzEycXBKNTA68S/YwCORV6n8WfvXyd0ZXn9TKqUWrq1dcPC649vjoi/6F3C9+/2PYZLiy0cV dXtcZ7AxHE455cu997bU+pePtEoqTEwyVD+t9fhf2XIq/lVLgYE142Jp3r0rymbGvlyWs2Tb D3aBihOC3Ns7Hr8rPrRl+sz3SgdN5OpU9q7982/nN0GXu0V9SizFGYmGWsxFxYkA1fzLgJIC AAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrDIsWRmVeSWpSXmKPExsVy+t9jQd3vRXOCDC4etbB4MG8bm8XD9TdZ LDqOtDBaTDn8hcXi25ZtjBaTF89ntlj+eiO7xdu9newOHB6zGy6yeCzYVOpx59oeNo+zd3Yw evRtWcXocfzGdqYAtqgGRpuM1MSU1CKF1Lzk/JTMvHRbJe/geOd4UzMDQ11DSwtzJYW8xNxU WyUXnwBdt8wcoIuUFMoSc0qBQgGJxcVK+naYJoSGuOlawDRG6PqGBMH1GBmggYQ1jBlL2p4x FcyRr9h4YwNTA+MJqS5GTg4JAROJ74vWs0LYYhIX7q1n62Lk4hASmM4o0fazmxXC6WKSWDTj DJDDwcEG1LHxRAJIg4iAhMSv/quMIDXMAvMZJZb/3s0MkhAWsJc4s3sd2FQWAVWJ732XGEF6 eQU8JB7f9IBYpigxY8kzRhCbU8BTYtrjDSwgJUJAJQ8fek9g5F3AyLCKUTS1ILmgOCk911Cv ODG3uDQvXS85P3cTIziunkntYFzZYHGIUYCDUYmH96LwnCAh1sSy4srcQ4wSHMxKIrwvE4FC vCmJlVWpRfnxRaU5qcWHGJOBbprILCWanA+M+bySeENjE3NTY1NLEwsTM0vShJXEeQ+0WgcK CaQnlqRmp6YWpBbBbGHi4JRqYOST7Li7Qjrrn/aFtnc3vZ+l/I6ZemhjfSK3w4OuT0V8c2O+ sbDu4hOrcp1x13jL3IlLN0d18dpL5wh2qPCs+Wu6vYidtUqkcEqh6VajdwtYvRWmHDOOdbrT eHbmkW3fhJu/TE2Q+DRpyZ+PhXpdZ9qUmb5E+sUyMAc3qNnUVH9cE2p59+rDbUosxRmJhlrM RcWJAN9CuN/vAgAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Cc: u-boot-review@google.com, patches@linaro.org, alim.akhtar@samsung.com, trini@ti.com Subject: [U-Boot] [PATCH 2/9 V9] Exynos5420: Add base addresses for 5420 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Adds base addresses of various IPs and controllers required for Exynos5420. Signed-off-by: Rajeshwari S Shinde Signed-off-by: Akshay Saraswat Acked-by: Simon Glass --- Changes in V2: - None Changes in V3: - None Changes in V4: - Added base address for TZPC. Changes in V5: - None Chnages in V6: - Rebased on latest samsung mainline branch. Changes in V7: - Corrected the comments Changes in V8: - None Chnages in V9: - None arch/arm/include/asm/arch-exynos/cpu.h | 49 +++++++++++++++++++++++++++++++++- 1 file changed, 48 insertions(+), 1 deletion(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index b4ef03e..2b44210 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -92,7 +92,7 @@ #define EXYNOS4X12_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4X12_USB3PHY_BASE DEVICE_NOT_AVAILABLE -/* EXYNOS5 Common*/ +/* EXYNOS5 */ #define EXYNOS5_I2C_SPACING 0x10000 #define EXYNOS5_AUDIOSS_BASE 0x03810000 @@ -130,6 +130,46 @@ #define EXYNOS5_ADC_BASE DEVICE_NOT_AVAILABLE #define EXYNOS5_MODEM_BASE DEVICE_NOT_AVAILABLE +/* EXYNOS5420 */ +#define EXYNOS5420_AUDIOSS_BASE 0x03810000 +#define EXYNOS5420_GPIO_PART5_BASE 0x03860000 +#define EXYNOS5420_PRO_ID 0x10000000 +#define EXYNOS5420_CLOCK_BASE 0x10010000 +#define EXYNOS5420_POWER_BASE 0x10040000 +#define EXYNOS5420_SWRESET 0x10040400 +#define EXYNOS5420_SYSREG_BASE 0x10050000 +#define EXYNOS5420_TZPC_BASE 0x100E0000 +#define EXYNOS5420_WATCHDOG_BASE 0x101D0000 +#define EXYNOS5420_ACE_SFR_BASE 0x10830000 +#define EXYNOS5420_DMC_PHY_BASE 0x10C00000 +#define EXYNOS5420_DMC_CTRL_BASE 0x10C20000 +#define EXYNOS5420_DMC_TZASC0_BASE 0x10D40000 +#define EXYNOS5420_DMC_TZASC1_BASE 0x10D50000 +#define EXYNOS5420_USB_HOST_EHCI_BASE 0x12110000 +#define EXYNOS5420_MMC_BASE 0x12200000 +#define EXYNOS5420_SROMC_BASE 0x12250000 +#define EXYNOS5420_UART_BASE 0x12C00000 +#define EXYNOS5420_I2C_BASE 0x12C60000 +#define EXYNOS5420_I2C_8910_BASE 0x12E00000 +#define EXYNOS5420_SPI_BASE 0x12D20000 +#define EXYNOS5420_I2S_BASE 0x12D60000 +#define EXYNOS5420_PWMTIMER_BASE 0x12DD0000 +#define EXYNOS5420_SPI_ISP_BASE 0x131A0000 +#define EXYNOS5420_GPIO_PART2_BASE 0x13400000 +#define EXYNOS5420_GPIO_PART3_BASE 0x13410000 +#define EXYNOS5420_GPIO_PART4_BASE 0x14000000 +#define EXYNOS5420_GPIO_PART1_BASE 0x14010000 +#define EXYNOS5420_MIPI_DSIM_BASE 0x14500000 +#define EXYNOS5420_DP_BASE 0x145B0000 + +#define EXYNOS5420_USBPHY_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS5420_USBOTG_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS5420_FIMD_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS5420_ADC_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS5420_MODEM_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS5420_USB3PHY_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS5420_USB_HOST_XHCI_BASE DEVICE_NOT_AVAILABLE + #ifndef __ASSEMBLY__ #include /* CPU detection macros */ @@ -163,6 +203,10 @@ static inline void s5p_set_cpu_id(void) /* Exynos5250 */ s5p_cpu_id = 0x5250; break; + case 0x420: + /* Exynos5420 */ + s5p_cpu_id = 0x5420; + break; } } @@ -190,6 +234,7 @@ static inline int __attribute__((no_instrument_function)) \ IS_EXYNOS_TYPE(exynos4210, 0x4210) IS_EXYNOS_TYPE(exynos4412, 0x4412) IS_EXYNOS_TYPE(exynos5250, 0x5250) +IS_EXYNOS_TYPE(exynos5420, 0x5420) #define SAMSUNG_BASE(device, base) \ static inline unsigned int __attribute__((no_instrument_function)) \ @@ -200,6 +245,8 @@ static inline unsigned int __attribute__((no_instrument_function)) \ return EXYNOS4X12_##base; \ return EXYNOS4_##base; \ } else if (cpu_is_exynos5()) { \ + if (proid_is_exynos5420()) \ + return EXYNOS5420_##base; \ return EXYNOS5_##base; \ } \ return 0; \