From patchwork Wed Nov 20 16:42:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alban Bedel X-Patchwork-Id: 292818 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3A6CC2C008A for ; Thu, 21 Nov 2013 03:43:23 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C2D264A2FB; Wed, 20 Nov 2013 17:43:20 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ApxPlkWDBi+3; Wed, 20 Nov 2013 17:43:20 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7D16A4A798; Wed, 20 Nov 2013 17:43:18 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 277754A798 for ; Wed, 20 Nov 2013 17:43:13 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CWmHlwv9wQn1 for ; Wed, 20 Nov 2013 17:43:07 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from moutng.kundenserver.de (moutng.kundenserver.de [212.227.17.8]) by theia.denx.de (Postfix) with ESMTPS id 17CC54A2FB for ; Wed, 20 Nov 2013 17:43:00 +0100 (CET) Received: from mailbox.adnet.avionic-design.de (mailbox.avionic-design.de [109.75.18.3]) by mrelayeu.kundenserver.de (node=mrbap3) with ESMTP (Nemesis) id 0LoqDL-1VCt7C3FQh-00gJCI; Wed, 20 Nov 2013 17:42:57 +0100 Received: from localhost (localhost [127.0.0.1]) by mailbox.adnet.avionic-design.de (Postfix) with ESMTP id 07CA32A28226; Wed, 20 Nov 2013 17:42:57 +0100 (CET) X-Virus-Scanned: amavisd-new at avionic-design.de Received: from mailbox.adnet.avionic-design.de ([127.0.0.1]) by localhost (mailbox.avionic-design.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 9lqYWhiUPZht; Wed, 20 Nov 2013 17:42:55 +0100 (CET) Received: from mailman.adnet.avionic-design.de (mailman.adnet.avionic-design.de [172.20.31.172]) by mailbox.adnet.avionic-design.de (Postfix) with ESMTP id A17832A28202; Wed, 20 Nov 2013 17:42:55 +0100 (CET) Received: from avionic-0020.mockup.avionic-design.de (avionic-0020.adnet.avionic-design.de [172.20.31.243]) by mailman.adnet.avionic-design.de (Postfix) with ESMTP id 8750E1006A9; Wed, 20 Nov 2013 17:42:54 +0100 (CET) From: Alban Bedel To: u-boot@lists.denx.de Date: Wed, 20 Nov 2013 17:42:46 +0100 Message-Id: <1384965766-28291-1-git-send-email-alban.bedel@avionic-design.de> X-Mailer: git-send-email 1.8.4.3 X-Provags-ID: V02:K0:urJ4YhmJtYKctFEyAiYKpr9K2+ytad5YLWJ4IssGC7o RK0HwW9hvRJ8usPS6WmT2VkpUj6/3mdv6nkPKDhc3BlTPKRq8M dJWalLT4Aj7zDu+S80gA6FyhG97laOnmODzd7y12t65Gk1LUaA M3MJHa1Z17/Y4u69PmpBZVfHtQuPmtqLXgnzrPSMvi4BuQYGMV oRi22ojaHL/l/AlV7cJCqOQYPC6H/DXE8NsGJmVSvAZhypUHti MrhCV5ZzLbdeZEzWRITD6c90OjlU8sCgtua/PEx7WirI+d+lbT c/FJ+S8dz/LUpheTGksi0y7a9PwUs8YOh7C0VCIMFQH38v/sgG +RMQLafhTCX5P2bjYyVl2XtBv0BU1V3amIVISa375A2VgGieUS mQDPu8Txyk0u5HIyj6mACEyEKUmQGptKMNgtaB3bjlhadFpY+h BEStg Cc: Alban Bedel , Julian Scheel , Tom Warren Subject: [U-Boot] [PATCH] arm: tegra: Fix the CPU complex reset masks X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The CPU complex reset masks are not matching with the datasheet for the CLK_RST_CONTROLLER_RST_CPU_CMPLX_SET/CLR_0 registers. For both T20 and T30 the register consist of groups of 4 bits, with one bit for each CPU core. On T20 the 2 high bits of each group are always stubbed as there is only 2 cores. Signed-off-by: Alban Bedel Acked-by: Stephen Warren Tested-by: Stephen Warren --- arch/arm/include/asm/arch-tegra/clock.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h index c3174bd..e7d0fd4 100644 --- a/arch/arm/include/asm/arch-tegra/clock.h +++ b/arch/arm/include/asm/arch-tegra/clock.h @@ -113,9 +113,9 @@ void reset_set_enable(enum periph_id periph_id, int enable); enum crc_reset_id { /* Things we can hold in reset for each CPU */ crc_rst_cpu = 1, - crc_rst_de = 1 << 2, /* What is de? */ - crc_rst_watchdog = 1 << 3, - crc_rst_debug = 1 << 4, + crc_rst_de = 1 << 4, /* What is de? */ + crc_rst_watchdog = 1 << 8, + crc_rst_debug = 1 << 12, }; /**