diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 727a052..6f85c42 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -17,6 +17,7 @@ endif
 ifeq ($(SOC),$(filter $(SOC),mx5 mx6))
 COBJS-y	+= timer.o cpu.o speed.o
 COBJS-$(CONFIG_I2C_MXC) += i2c-mxv7.o
+COBJS-$(CONFIG_CMD_SATA) += sata.o
 endif
 ifeq ($(SOC),$(filter $(SOC),mx6 mxs))
 COBJS-y	+= misc.o
diff --git a/arch/arm/imx-common/sata.c b/arch/arm/imx-common/sata.c
new file mode 100644
index 0000000..00b3d92
--- /dev/null
+++ b/arch/arm/imx-common/sata.c
@@ -0,0 +1,33 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <asm/imx-common/iomux-v3.h>
+#include <asm/arch/iomux.h>
+#include <asm/io.h>
+
+int sata_setup(void)
+{
+	struct iomuxc_base_regs *const iomuxc_regs
+		= (struct iomuxc_base_regs *)IOMUXC_BASE_ADDR;
+
+	int ret = enable_sata_clock();
+	if (ret)
+		return ret;
+
+	clrsetbits_le32(&iomuxc_regs->gpr[13],
+			IOMUXC_GPR13_SATA_MASK,
+			IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
+			|IOMUXC_GPR13_SATA_PHY_7_SATA2M
+			|IOMUXC_GPR13_SATA_SPEED_3G
+			|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
+			|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
+			|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
+			|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
+			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
+			|IOMUXC_GPR13_SATA_PHY_1_SLOW);
+
+	return 0;
+}
diff --git a/arch/arm/include/asm/imx-common/sata.h b/arch/arm/include/asm/imx-common/sata.h
new file mode 100644
index 0000000..40fbf77
--- /dev/null
+++ b/arch/arm/include/asm/imx-common/sata.h
@@ -0,0 +1,17 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __IMX_SATA_H_
+#define __IMX_SATA_H_
+
+/*
+ * SATA setup for i.mx6 quad based platform
+ */
+
+int sata_setup(void);
+
+#endif
+
diff --git a/board/boundary/nitrogen6x/nitrogen6x.c b/board/boundary/nitrogen6x/nitrogen6x.c
index 1712908..0c26bcb 100644
--- a/board/boundary/nitrogen6x/nitrogen6x.c
+++ b/board/boundary/nitrogen6x/nitrogen6x.c
@@ -17,6 +17,7 @@
 #include <asm/gpio.h>
 #include <asm/imx-common/iomux-v3.h>
 #include <asm/imx-common/mxc_i2c.h>
+#include <asm/imx-common/sata.h>
 #include <asm/imx-common/boot_mode.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
@@ -378,32 +379,6 @@ static void setup_buttons(void)
 					 ARRAY_SIZE(button_pads));
 }
 
-#ifdef CONFIG_CMD_SATA
-
-int setup_sata(void)
-{
-	struct iomuxc_base_regs *const iomuxc_regs
-		= (struct iomuxc_base_regs *) IOMUXC_BASE_ADDR;
-	int ret = enable_sata_clock();
-	if (ret)
-		return ret;
-
-	clrsetbits_le32(&iomuxc_regs->gpr[13],
-			IOMUXC_GPR13_SATA_MASK,
-			IOMUXC_GPR13_SATA_PHY_8_RXEQ_3P0DB
-			|IOMUXC_GPR13_SATA_PHY_7_SATA2M
-			|IOMUXC_GPR13_SATA_SPEED_3G
-			|(3<<IOMUXC_GPR13_SATA_PHY_6_SHIFT)
-			|IOMUXC_GPR13_SATA_SATA_PHY_5_SS_DISABLED
-			|IOMUXC_GPR13_SATA_SATA_PHY_4_ATTEN_9_16
-			|IOMUXC_GPR13_SATA_PHY_3_TXBOOST_0P00_DB
-			|IOMUXC_GPR13_SATA_PHY_2_TX_1P104V
-			|IOMUXC_GPR13_SATA_PHY_1_SLOW);
-
-	return 0;
-}
-#endif
-
 #if defined(CONFIG_VIDEO_IPUV3)
 
 static iomux_v3_cfg_t const backlight_pads[] = {
diff --git a/board/udoo/udoo.c b/board/udoo/udoo.c
index ca49ebb..b53f70c 100644
--- a/board/udoo/udoo.c
+++ b/board/udoo/udoo.c
@@ -14,6 +14,7 @@
 #include <asm/errno.h>
 #include <asm/gpio.h>
 #include <asm/imx-common/iomux-v3.h>
+#include <asm/imx-common/sata.h>
 #include <mmc.h>
 #include <fsl_esdhc.h>
 #include <asm/arch/crm_regs.h>
@@ -239,6 +240,9 @@ int board_init(void)
 	/* address of boot parameters */
 	gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
 
+#ifdef CONFIG_CMD_SATA
+	sata_setup();
+#endif
 	return 0;
 }
 
diff --git a/include/configs/udoo.h b/include/configs/udoo.h
index b9a493c..a1a1750 100644
--- a/include/configs/udoo.h
+++ b/include/configs/udoo.h
@@ -34,6 +34,18 @@
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE		UART2_BASE
 
+/* SATA Configs */
+
+#define CONFIG_CMD_SATA
+#ifdef CONFIG_CMD_SATA
+#define CONFIG_DWC_AHSATA
+#define CONFIG_SYS_SATA_MAX_DEVICE	1
+#define CONFIG_DWC_AHSATA_PORT_ID	0
+#define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
+#define CONFIG_LBA48
+#define CONFIG_LIBATA
+#endif
+
 /* Network support */
 
 #define CONFIG_CMD_PING
