From patchwork Tue Sep 24 08:19:59 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Po Liu X-Patchwork-Id: 277390 X-Patchwork-Delegate: yorksun@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 1EEB52C0091 for ; Tue, 24 Sep 2013 18:25:50 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C06754A08A; Tue, 24 Sep 2013 10:25:48 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OafUE++0M+n7; Tue, 24 Sep 2013 10:25:48 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3F5CC4A08D; Tue, 24 Sep 2013 10:25:43 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C5CD34A08D for ; Tue, 24 Sep 2013 10:25:37 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id rG6+sKNUpGrU for ; Tue, 24 Sep 2013 10:25:32 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from co9outboundpool.messaging.microsoft.com (co9ehsobe004.messaging.microsoft.com [207.46.163.27]) by theia.denx.de (Postfix) with ESMTPS id 2EA694A08A for ; Tue, 24 Sep 2013 10:25:23 +0200 (CEST) Received: from mail91-co9-R.bigfish.com (10.236.132.231) by CO9EHSOBE014.bigfish.com (10.236.130.77) with Microsoft SMTP Server id 14.1.225.22; Tue, 24 Sep 2013 08:25:21 +0000 Received: from mail91-co9 (localhost [127.0.0.1]) by mail91-co9-R.bigfish.com (Postfix) with ESMTP id 3C4303C011B for ; Tue, 24 Sep 2013 08:25:21 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 1 X-BigFish: VS1(z551bizzz1f42h208ch1ee6h1de0h1fdah2073h1202h1e76h1d1ah1d2ah1fc6hzz1de098h17326ah1de097h186068h8275bh8275dhz2dh2a8h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h16a6h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh1fb3h1d0ch1d2eh1d3fh1dc1h1de2h1dfeh1dffh1e23h1fe8h1ff5h1155h) Received: from mail91-co9 (localhost.localdomain [127.0.0.1]) by mail91-co9 (MessageSwitch) id 1380011119251477_25387; Tue, 24 Sep 2013 08:25:19 +0000 (UTC) Received: from CO9EHSMHS007.bigfish.com (unknown [10.236.132.229]) by mail91-co9.bigfish.com (Postfix) with ESMTP id 36324B80069 for ; Tue, 24 Sep 2013 08:25:19 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO9EHSMHS007.bigfish.com (10.236.130.17) with Microsoft SMTP Server (TLS) id 14.16.227.3; Tue, 24 Sep 2013 08:25:19 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-005.039d.mgd.msft.net (10.84.1.17) with Microsoft SMTP Server (TLS) id 14.3.158.2; Tue, 24 Sep 2013 08:25:18 +0000 Received: from localhost (rock.ap.freescale.net [10.193.20.106]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r8O8PGoo013886; Tue, 24 Sep 2013 01:25:17 -0700 From: Po Liu To: Date: Tue, 24 Sep 2013 16:19:59 +0800 Message-ID: <1380010799-26820-1-git-send-email-Po.Liu@freescale.com> X-Mailer: git-send-email 1.8.0 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Cc: scottwood@freescale.com, Po Liu Subject: [U-Boot] [PATCH] powerpc/c29xpcie: add DDR ECC on off config setting X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de c29xpcie REV_A board DDR ECC chip has bad impedance in hardware, force that kind of board to be DDR ECC off when booting. Other version board config ECC on/off by hwconfig=fsl_ddr:ecc=on in uboot enviroment. Signed-off-by: Po Liu --- Add this patch after the camelcase patch http://patchwork.ozlabs.org/patch/271670/ was added. board/freescale/c29xpcie/ddr.c | 8 ++++++++ include/configs/C29XPCIE.h | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) diff --git a/board/freescale/c29xpcie/ddr.c b/board/freescale/c29xpcie/ddr.c index b017cfd..4077ed9 100644 --- a/board/freescale/c29xpcie/ddr.c +++ b/board/freescale/c29xpcie/ddr.c @@ -9,6 +9,9 @@ #include #include +#include "cpld.h" + +#define C29XPCIE_HARDWARE_REVA 0x40 /* * Micron MT41J128M16HA-15E * */ @@ -61,7 +64,9 @@ void fsl_ddr_board_options(memctl_options_t *popts, dimm_params_t *pdimm, unsigned int ctrl_num) { + struct cpld_data *cpld_data = (void *)(CONFIG_SYS_CPLD_BASE); int i; + popts->clk_adjust = 2; popts->cpo_override = 0x1f; popts->write_data_delay = 4; @@ -79,6 +84,9 @@ void fsl_ddr_board_options(memctl_options_t *popts, popts->trwt_override = 1; popts->trwt = 0; + if (in_8(&cpld_data->hwver) == C29XPCIE_HARDWARE_REVA) + popts->ecc_mode = 0; + for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) { popts->cs_local_opts[i].odt_rd_cfg = FSL_DDR_ODT_NEVER; popts->cs_local_opts[i].odt_wr_cfg = FSL_DDR_ODT_CS; diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h index 83779ef..877375d 100644 --- a/include/configs/C29XPCIE.h +++ b/include/configs/C29XPCIE.h @@ -432,7 +432,7 @@ #define CONFIG_BAUDRATE 115200 #define CONFIG_EXTRA_ENV_SETTINGS \ - "hwconfig=" __stringify(CONFIG_DEF_HWCONFIG) "\0" \ + "hwconfig=fsl_ddr:ecc=off\0" \ "netdev=eth0\0" \ "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ "loadaddr=1000000\0" \