From patchwork Mon Aug 26 12:10:56 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Phil Sutter X-Patchwork-Id: 269873 X-Patchwork-Delegate: scottwood@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 6D1C22C00C7 for ; Mon, 26 Aug 2013 22:18:00 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8EDA04A023; Mon, 26 Aug 2013 14:17:57 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id HU2jqYILP3NO; Mon, 26 Aug 2013 14:17:57 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 90EA44A05E; Mon, 26 Aug 2013 14:17:55 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 82ED94A05E for ; Mon, 26 Aug 2013 14:17:47 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id F+C-fVPJyaU2 for ; Mon, 26 Aug 2013 14:17:40 +0200 (CEST) X-Greylist: delayed 386 seconds by postgrey-1.27 at theia; Mon, 26 Aug 2013 14:17:34 CEST X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from zimbra.vipri.net (zimbra.vipri.net [89.207.250.15]) by theia.denx.de (Postfix) with ESMTP id 1A2044A023 for ; Mon, 26 Aug 2013 14:17:34 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by zimbra.vipri.net (Postfix) with ESMTP id F2581238002; Mon, 26 Aug 2013 14:03:48 +0200 (CEST) X-Virus-Scanned: amavisd-new at zimbra.vipri.net Received: from zimbra.vipri.net ([127.0.0.1]) by localhost (zimbra.vipri.net [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ZMSV5Wdg29fX; Mon, 26 Aug 2013 14:03:48 +0200 (CEST) Received: from phil.computerman.de (host-089-207-255-234.vipri.net [89.207.255.234]) by zimbra.vipri.net (Postfix) with ESMTPSA id F3078228003; Mon, 26 Aug 2013 14:03:47 +0200 (CEST) From: Phil Sutter To: u-boot@lists.denx.de Date: Mon, 26 Aug 2013 14:10:56 +0200 Message-Id: <1377519056-25364-1-git-send-email-phil.sutter@viprinet.com> X-Mailer: git-send-email 1.8.2.1 Cc: Scott Wood , Nico Erfurth Subject: [U-Boot] [PATCHv4] Optimized nand_read_buf for kirkwood X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Nico Erfurth The basic idea is taken from the linux-kernel, but further optimized. First align the buffer to 8 bytes, then use ldrd/strd to read and store in 8 byte quantities, then do the final bytes. Tested using: 'date ; nand read.raw 0xE00000 0x0 0x10000 ; date'. Without this patch, NAND read of 132MB took 49s (~2.69MB/s). With this patch in place, reading the same amount of data was done in 27s (~4.89MB/s). So read performance is increased by ~80%! Signed-off-by: Nico Erfurth Tested-by: Phil Sutter Cc: Prafulla Wadaskar --- Changed since V3: - fixed author --- drivers/mtd/nand/kirkwood_nand.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/mtd/nand/kirkwood_nand.c b/drivers/mtd/nand/kirkwood_nand.c index 0a99a10..85ea5d2 100644 --- a/drivers/mtd/nand/kirkwood_nand.c +++ b/drivers/mtd/nand/kirkwood_nand.c @@ -38,6 +38,37 @@ struct kwnandf_registers { static struct kwnandf_registers *nf_reg = (struct kwnandf_registers *)KW_NANDF_BASE; + +/* + * The basic idea is stolen from the linux kernel, but the inner loop is + * optimized a bit more. + */ +static void kw_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{ + struct nand_chip *chip = mtd->priv; + + while (len && (unsigned long)buf & 7) { + *buf++ = readb(chip->IO_ADDR_R); + len--; + }; + + /* This loop reads and writes 64bit per round. */ + asm volatile ( + "1:\n" + " subs %0, #8\n" + " ldrpld r2, [%2]\n" + " strpld r2, [%1], #8\n" + " bhi 1b\n" + " addne %0, #8\n" + : "+&r" (len), "+&r" (buf) + : "r" (chip->IO_ADDR_R) + : "r2", "r3", "memory", "cc" + ); + + while (len--) + *buf++ = readb(chip->IO_ADDR_R); +} + /* * hardware specific access to control-lines/bits */ @@ -80,6 +111,7 @@ int board_nand_init(struct nand_chip *nand) nand->ecc.mode = NAND_ECC_SOFT; #endif nand->cmd_ctrl = kw_nand_hwcontrol; + nand->read_buf = kw_nand_read_buf; nand->chip_delay = 40; nand->select_chip = kw_nand_select_chip; return 0;