From patchwork Tue Aug 13 06:38:29 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bo Shen X-Patchwork-Id: 266729 X-Patchwork-Delegate: andreas.biessmann@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 807892C013D for ; Tue, 13 Aug 2013 16:43:30 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7F5144A0C2; Tue, 13 Aug 2013 08:43:22 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id CojfJZpd5QZP; Tue, 13 Aug 2013 08:43:22 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7EC994A104; Tue, 13 Aug 2013 08:43:17 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2DC074A0C2 for ; Tue, 13 Aug 2013 08:43:11 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id kEtgRVCDGWqs for ; Tue, 13 Aug 2013 08:43:04 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from sjogate2.atmel.com (newsmtp5.atmel.com [204.2.163.5]) by theia.denx.de (Postfix) with ESMTP id 65EED4A0BF for ; Tue, 13 Aug 2013 08:42:58 +0200 (CEST) Received: from shaarm01.corp.atmel.com ([10.217.6.34]) by sjogate2.atmel.com (8.13.6/8.13.6) with ESMTP id r7D6aoh5026407; Mon, 12 Aug 2013 23:36:58 -0700 (PDT) From: Bo Shen To: andreas.devel@googlemail.com Date: Tue, 13 Aug 2013 14:38:29 +0800 Message-Id: <1376375912-13835-2-git-send-email-voice.shen@atmel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1376375912-13835-1-git-send-email-voice.shen@atmel.com> References: <1376375912-13835-1-git-send-email-voice.shen@atmel.com> Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/4] gpio: atmel: fix code to use pointer for pio port X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de fix code to use pointer for pio port as the warning message suggested remove the warning message Signed-off-by: Bo Shen --- drivers/gpio/at91_gpio.c | 232 ++++++++++++++++++++++++++-------------------- 1 file changed, 134 insertions(+), 98 deletions(-) diff --git a/drivers/gpio/at91_gpio.c b/drivers/gpio/at91_gpio.c index 2322914..15f396f 100644 --- a/drivers/gpio/at91_gpio.c +++ b/drivers/gpio/at91_gpio.c @@ -8,16 +8,6 @@ * SPDX-License-Identifier: GPL-2.0+ */ -/* - * WARNING: - * - * As the code is right now, it expects all PIO ports A,B,C,... - * to be evenly spaced in the memory map: - * ATMEL_BASE_PIOA + port * sizeof at91pio_t - * This might not necessaryly be true in future Atmel SoCs. - * This code should be fixed to use a pointer array to the ports. - */ - #include #include #include @@ -25,19 +15,52 @@ #include #include +static unsigned at91_pio_get_port(unsigned port) +{ + unsigned at91_port; + + switch (port) { + case AT91_PIO_PORTA: + at91_port = ATMEL_BASE_PIOA; + break; + case AT91_PIO_PORTB: + at91_port = ATMEL_BASE_PIOB; + break; + case AT91_PIO_PORTC: + at91_port = ATMEL_BASE_PIOC; + break; + #if (ATMEL_PIO_PORTS > 3) + case AT91_PIO_PORTD: + at91_port = ATMEL_BASE_PIOD; + break; + #endif + #if (ATMEL_PIO_PORTS > 4) + case AT91_PIO_PORTE: + at91_port = ATMEL_BASE_PIOE; + break; + #endif + default: + at91_port = 0; + break; + } + + return at91_port; +} + int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; if (use_pullup) - writel(1 << pin, &pio->port[port].puer); + writel(1 << pin, &at91_port->puer); else - writel(1 << pin, &pio->port[port].pudr); - writel(mask, &pio->port[port].per); + writel(1 << pin, &at91_port->pudr); + writel(mask, &at91_port->per); } + return 0; } @@ -46,15 +69,16 @@ int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup) */ int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - writel(mask, &pio->port[port].idr); + writel(mask, &at91_port->idr); at91_set_pio_pullup(port, pin, use_pullup); - writel(mask, &pio->port[port].per); + writel(mask, &at91_port->per); } + return 0; } @@ -63,23 +87,24 @@ int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup) */ int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - writel(mask, &pio->port[port].idr); + writel(mask, &at91_port->idr); at91_set_pio_pullup(port, pin, use_pullup); #if defined(CPU_HAS_PIO3) - writel(readl(&pio->port[port].abcdsr1) & ~mask, - &pio->port[port].abcdsr1); - writel(readl(&pio->port[port].abcdsr2) & ~mask, - &pio->port[port].abcdsr2); + writel(readl(&at91_port->abcdsr1) & ~mask, + &at91_port->abcdsr1); + writel(readl(&at91_port->abcdsr2) & ~mask, + &at91_port->abcdsr2); #else - writel(mask, &pio->port[port].asr); + writel(mask, &at91_port->asr); #endif - writel(mask, &pio->port[port].pdr); + writel(mask, &at91_port->pdr); } + return 0; } @@ -88,23 +113,24 @@ int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup) */ int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - writel(mask, &pio->port[port].idr); + writel(mask, &at91_port->idr); at91_set_pio_pullup(port, pin, use_pullup); #if defined(CPU_HAS_PIO3) - writel(readl(&pio->port[port].abcdsr1) | mask, - &pio->port[port].abcdsr1); - writel(readl(&pio->port[port].abcdsr2) & ~mask, - &pio->port[port].abcdsr2); + writel(readl(&at91_port->abcdsr1) | mask, + &at91_port->abcdsr1); + writel(readl(&at91_port->abcdsr2) & ~mask, + &at91_port->abcdsr2); #else - writel(mask, &pio->port[port].bsr); + writel(mask, &at91_port->bsr); #endif - writel(mask, &pio->port[port].pdr); + writel(mask, &at91_port->pdr); } + return 0; } @@ -114,19 +140,20 @@ int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup) */ int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - writel(mask, &pio->port[port].idr); + writel(mask, &at91_port->idr); at91_set_pio_pullup(port, pin, use_pullup); - writel(readl(&pio->port[port].abcdsr1) & ~mask, - &pio->port[port].abcdsr1); - writel(readl(&pio->port[port].abcdsr2) | mask, - &pio->port[port].abcdsr2); - writel(mask, &pio->port[port].pdr); + writel(readl(&at91_port->abcdsr1) & ~mask, + &at91_port->abcdsr1); + writel(readl(&at91_port->abcdsr2) | mask, + &at91_port->abcdsr2); + writel(mask, &at91_port->pdr); } + return 0; } @@ -135,19 +162,20 @@ int at91_set_c_periph(unsigned port, unsigned pin, int use_pullup) */ int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - writel(mask, &pio->port[port].idr); + writel(mask, &at91_port->idr); at91_set_pio_pullup(port, pin, use_pullup); - writel(readl(&pio->port[port].abcdsr1) | mask, - &pio->port[port].abcdsr1); - writel(readl(&pio->port[port].abcdsr2) | mask, - &pio->port[port].abcdsr2); - writel(mask, &pio->port[port].pdr); + writel(readl(&at91_port->abcdsr1) | mask, + &at91_port->abcdsr1); + writel(readl(&at91_port->abcdsr2) | mask, + &at91_port->abcdsr2); + writel(mask, &at91_port->pdr); } + return 0; } #endif @@ -158,15 +186,15 @@ int at91_set_d_periph(unsigned port, unsigned pin, int use_pullup) */ int at91_set_pio_input(unsigned port, u32 pin, int use_pullup) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - writel(mask, &pio->port[port].idr); + writel(mask, &at91_port->idr); at91_set_pio_pullup(port, pin, use_pullup); - writel(mask, &pio->port[port].odr); - writel(mask, &pio->port[port].per); + writel(mask, &at91_port->odr); + writel(mask, &at91_port->per); } return 0; } @@ -177,20 +205,21 @@ int at91_set_pio_input(unsigned port, u32 pin, int use_pullup) */ int at91_set_pio_output(unsigned port, u32 pin, int value) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - writel(mask, &pio->port[port].idr); - writel(mask, &pio->port[port].pudr); + writel(mask, &at91_port->idr); + writel(mask, &at91_port->pudr); if (value) - writel(mask, &pio->port[port].sodr); + writel(mask, &at91_port->sodr); else - writel(mask, &pio->port[port].codr); - writel(mask, &pio->port[port].oer); - writel(mask, &pio->port[port].per); + writel(mask, &at91_port->codr); + writel(mask, &at91_port->oer); + writel(mask, &at91_port->per); } + return 0; } @@ -199,20 +228,21 @@ int at91_set_pio_output(unsigned port, u32 pin, int value) */ int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; if (is_on) { #if defined(CPU_HAS_PIO3) - writel(mask, &pio->port[port].ifscdr); + writel(mask, &at91_port->ifscdr); #endif - writel(mask, &pio->port[port].ifer); + writel(mask, &at91_port->ifer); } else { - writel(mask, &pio->port[port].ifdr); + writel(mask, &at91_port->ifdr); } } + return 0; } @@ -222,19 +252,20 @@ int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on) */ int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; if (is_on) { - writel(mask, &pio->port[port].ifscer); - writel(div & PIO_SCDR_DIV, &pio->port[port].scdr); - writel(mask, &pio->port[port].ifer); + writel(mask, &at91_port->ifscer); + writel(div & PIO_SCDR_DIV, &at91_port->scdr); + writel(mask, &at91_port->ifer); } else { - writel(mask, &pio->port[port].ifdr); + writel(mask, &at91_port->ifdr); } } + return 0; } @@ -244,17 +275,18 @@ int at91_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div) */ int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - writel(mask, &pio->port[port].pudr); + writel(mask, &at91_port->pudr); if (is_on) - writel(mask, &pio->port[port].ppder); + writel(mask, &at91_port->ppder); else - writel(mask, &pio->port[port].ppddr); + writel(mask, &at91_port->ppddr); } + return 0; } @@ -263,14 +295,15 @@ int at91_set_pio_pulldown(unsigned port, unsigned pin, int is_on) */ int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - writel(readl(&pio->port[port].schmitt) | mask, - &pio->port[port].schmitt); + writel(readl(&at91_port->schmitt) | mask, + &at91_port->schmitt); } + return 0; } #endif @@ -281,16 +314,17 @@ int at91_set_pio_disable_schmitt_trig(unsigned port, unsigned pin) */ int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; if (is_on) - writel(mask, &pio->port[port].mder); + writel(mask, &at91_port->mder); else - writel(mask, &pio->port[port].mddr); + writel(mask, &at91_port->mddr); } + return 0; } @@ -299,16 +333,17 @@ int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on) */ int at91_set_pio_value(unsigned port, unsigned pin, int value) { - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; if (value) - writel(mask, &pio->port[port].sodr); + writel(mask, &at91_port->sodr); else - writel(mask, &pio->port[port].codr); + writel(mask, &at91_port->codr); } + return 0; } @@ -317,13 +352,14 @@ int at91_set_pio_value(unsigned port, unsigned pin, int value) */ int at91_get_pio_value(unsigned port, unsigned pin) { - u32 pdsr = 0; - at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA; - u32 mask; + u32 pdsr = 0; + at91_port_t *at91_port = (at91_port_t *)at91_pio_get_port(port); + u32 mask; if ((port < ATMEL_PIO_PORTS) && (pin < 32)) { mask = 1 << pin; - pdsr = readl(&pio->port[port].pdsr) & mask; + pdsr = readl(&at91_port->pdsr) & mask; } + return pdsr != 0; }