From patchwork Fri Jul 26 16:54:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabio Estevam X-Patchwork-Id: 262221 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id E2CB92C00EC for ; Sat, 27 Jul 2013 03:04:00 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 22A3D4A01C; Fri, 26 Jul 2013 19:03:57 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bXjJe2+bSIlD; Fri, 26 Jul 2013 19:03:57 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8D1504A01B; Fri, 26 Jul 2013 19:03:55 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 92BF34A01B for ; Fri, 26 Jul 2013 19:03:48 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qtmHk4UBSgg8 for ; Fri, 26 Jul 2013 19:03:43 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-yh0-f49.google.com (mail-yh0-f49.google.com [209.85.213.49]) by theia.denx.de (Postfix) with ESMTPS id 1C8654A019 for ; Fri, 26 Jul 2013 19:03:36 +0200 (CEST) Received: by mail-yh0-f49.google.com with SMTP id f64so1064609yha.8 for ; Fri, 26 Jul 2013 10:03:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer; bh=FztvRYtd1WdZwRffaQycXlWta6opuI3qTMeeLN8dDpE=; b=HNrdMcZM6h8Q4qbCV1cKHr+R5HLiAxO4WYCRpIBuAbDuxeNU+7+pQhHzo8Xk7k9mz8 U6y9z24Y7lUZ47DMeW7I65qETztqaDE0UWW3dEerbtGV1gcK0D5kMR5rtsclfEH94NAe ziDbhqQmUTylkx0y6Dw7mxI7xMa53dCzr9q8WN7ym82uBaXtIm96rI0zjSa+H8ej9lgS niyuk0FCJU/0TJ489qI3SJJu+8ldnXgjFmbha3HQegMuyPLvXE3VAvyV94QP5yIHhyeT nh4umeoBdkJaV5ElDD+ZYm6vIhCyd+7fVcyoif6rHB+4nuYsYhdwLQIhoMmkVaCiERsa YXag== X-Received: by 10.236.89.81 with SMTP id b57mr21236332yhf.28.1374857842146; Fri, 26 Jul 2013 09:57:22 -0700 (PDT) Received: from localhost.localdomain ([177.194.42.178]) by mx.google.com with ESMTPSA id y70sm65579520yhe.15.2013.07.26.09.57.20 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 26 Jul 2013 09:57:21 -0700 (PDT) From: Fabio Estevam To: marex@denx.de Date: Fri, 26 Jul 2013 13:54:27 -0300 Message-Id: <1374857668-28284-1-git-send-email-festevam@gmail.com> X-Mailer: git-send-email 1.8.1.2 Cc: Fabio Estevam , u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/2] usb: ehci-mx5: Remove unneeded write to cscmr1 register X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Fabio Estevam Currently we have the following behavior in ehci_hcd_init() - Read csmr1 register, clear bit 26 and then set bit 26. However a little bit later we call set_usb_phy_clk() which clears bit 26, so let's get rid of the unnecessary code. Signed-off-by: Fabio Estevam --- drivers/usb/host/ehci-mx5.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/usb/host/ehci-mx5.c b/drivers/usb/host/ehci-mx5.c index f43c38d..6178a1d 100644 --- a/drivers/usb/host/ehci-mx5.c +++ b/drivers/usb/host/ehci-mx5.c @@ -229,15 +229,6 @@ void __weak board_ehci_hcd_postinit(struct usb_ehci *ehci, int port) int ehci_hcd_init(int index, struct ehci_hccr **hccr, struct ehci_hcor **hcor) { struct usb_ehci *ehci; -#ifdef CONFIG_MX53 - struct clkctl *sc_regs = (struct clkctl *)CCM_BASE_ADDR; - u32 reg; - - reg = __raw_readl(&sc_regs->cscmr1) & ~(1 << 26); - /* derive USB PHY clock multiplexer from PLL3 */ - reg |= 1 << 26; - __raw_writel(reg, &sc_regs->cscmr1); -#endif set_usboh3_clk(); enable_usboh3_clk(1);