From patchwork Fri Jun 21 02:13:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 253118 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 280C82C00A2 for ; Fri, 21 Jun 2013 12:13:51 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 25ADB4A026; Fri, 21 Jun 2013 04:13:49 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aXDgOs3NgECC; Fri, 21 Jun 2013 04:13:48 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7351F4A03B; Fri, 21 Jun 2013 04:13:43 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B9A5B4A03B for ; Fri, 21 Jun 2013 04:13:41 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id TU9EcT6SvXeQ for ; Fri, 21 Jun 2013 04:13:36 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mo-p05-ob.rzone.de (mo-p05-ob.rzone.de [81.169.146.182]) by theia.denx.de (Postfix) with ESMTP id 526514A026 for ; Fri, 21 Jun 2013 04:13:31 +0200 (CEST) X-RZG-AUTH: :IW0NeWC7b/q2i6W/qstXb1SBUuFnrGohdvpEkce+Ub40Q/uAHDKmDv72PG5qtJ0= X-RZG-CLASS-ID: mo05 Received: from ubuntu-2012.fritz.box (pD958A085.dip0.t-ipconnect.de [217.88.160.133]) by smtp.strato.de (jorabe mo32) (RZmta 31.28 DYNA|AUTH) with ESMTPA id V071c5p5L0ZaiK ; Fri, 21 Jun 2013 04:13:22 +0200 (CEST) From: Stefan Roese To: u-boot@lists.denx.de Date: Fri, 21 Jun 2013 04:13:17 +0200 Message-Id: <1371780797-17248-1-git-send-email-sr@denx.de> X-Mailer: git-send-email 1.8.2.3 In-Reply-To: <1371200101-11510-1-git-send-email-sr@denx.de> References: <1371200101-11510-1-git-send-email-sr@denx.de> Cc: Tom Rini Subject: [U-Boot] [PATCH v2 1/3] arm: spl: Fix SPL booting for OMAP3 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Fix a problem with a re-assignment of r8 in the SPL version. This patch now moves the call to s_init() to a later stage, right before calling board_init_f(). And makes sure that r8 is correctly initialized before s_init() is called. r8 now is only written in crt0.S. This error was detected on the SPL port for the Compulab CM-T35 board (OMAP3530). Signed-off-by: Stefan Roese Cc: Tom Rini Cc: Albert ARIBAUD --- v2: - Change handling/initializing of r8 as suggested by Albert. It should only be written in crt0.S. Tom, while working on this version one question came up: Is lowlevel_init() (file arch/arm/cpu/armv7/omap3/lowlevel_init.S) needed any more? It calls cpy_clk_code() to copy some clk init code into SRAM. But I fail to see if and where this code is really executed from SRAM. Maybe I missed something. Perhaps you could shed some light into this. Thanks, Stefan arch/arm/cpu/armv7/omap3/board.c | 2 -- arch/arm/cpu/armv7/omap3/lowlevel_init.S | 3 +-- arch/arm/lib/crt0.S | 7 ++++++- 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index b72fadc..8f41dcd 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -256,8 +256,6 @@ void s_init(void) #endif #ifdef CONFIG_SPL_BUILD - gd = &gdata; - preloader_console_init(); timer_init(); diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S index eacfef8..8539093 100644 --- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S +++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S @@ -226,8 +226,7 @@ ENTRY(lowlevel_init) #endif /* NAND Boot */ mov lr, ip /* restore link reg */ ldr ip, [sp] /* restore save ip */ - /* tail-call s_init to setup pll, mux, memory */ - b s_init + mov pc, lr ENDPROC(lowlevel_init) diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S index a5bffb8..0f8d9f5 100644 --- a/arch/arm/lib/crt0.S +++ b/arch/arm/lib/crt0.S @@ -85,8 +85,13 @@ ENTRY(_main) bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ sub sp, #GD_SIZE /* allocate one GD above SP */ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - mov r8, sp /* GD is above SP */ mov r0, #0 +#if defined(CONFIG_SPL_BUILD) + ldr r8, =gdata /* SPL assigns r8 directly to &gdata */ + bl s_init /* s_init() needs GD to be setup */ +#else + mov r8, sp /* GD is above SP */ +#endif bl board_init_f #if ! defined(CONFIG_SPL_BUILD)