From patchwork Fri May 10 16:23:20 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dirk Behme X-Patchwork-Id: 243022 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 83E7A2C00D2 for ; Sat, 11 May 2013 02:23:50 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6F0D64A10F; Fri, 10 May 2013 18:23:47 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id aIQvLkNnL-ix; Fri, 10 May 2013 18:23:47 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 00A7F4A105; Fri, 10 May 2013 18:23:46 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B934E4A105 for ; Fri, 10 May 2013 18:23:39 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ZpZK1RbrA9qP for ; Fri, 10 May 2013 18:23:33 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-bk0-f54.google.com (mail-bk0-f54.google.com [209.85.214.54]) by theia.denx.de (Postfix) with ESMTPS id 8D1BC4A102 for ; Fri, 10 May 2013 18:23:26 +0200 (CEST) Received: by mail-bk0-f54.google.com with SMTP id y8so2152672bkt.27 for ; Fri, 10 May 2013 09:23:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:from:to:cc:subject:date:message-id:x-mailer; bh=F8ykj+Hr1XzPn8MULrR5jA6YyUfHyu4CTCB+fwUmx98=; b=pNoU81ljLauozXQlbVy1P/8HAe54TCYokvJUbcJd4V5p75uqUDWEfBe8qbWpsr+Gys cD22sLyNxJOgIvS1e7Qe+bV3mpyf8ng7N2YQ1PVQRWhrNO9UzxsG4xDa9oZlZ5C/1tF5 paBA3bPXtIn9ZyClyI5byPkOE9kmt4tBMuuJw4x1r7iDebWzeiytxEwvRCChSex0ILRT Ev/j4xAEV6OSZurt6VoMIaCdtWxnjtesBTFxd6VWnJOmYlKp55R/05RPH7UhWWzkc0xq 1HPwBWaYIWf1+LZXwMteXN6kAwTgzWr+aL5pRRQRauQV1hDEB6BswdDJaMYySvichtDf A97Q== X-Received: by 10.205.38.73 with SMTP id th9mr4590702bkb.0.1368203004934; Fri, 10 May 2013 09:23:24 -0700 (PDT) Received: from localhost.localdomain (p4FEE3CB3.dip0.t-ipconnect.de. [79.238.60.179]) by mx.google.com with ESMTPSA id fh8sm869635bkc.10.2013.05.10.09.23.23 for (version=TLSv1.1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Fri, 10 May 2013 09:23:24 -0700 (PDT) From: Dirk Behme To: u-boot@lists.denx.de Date: Fri, 10 May 2013 18:23:20 +0200 Message-Id: <1368203000-3386-1-git-send-email-dirk.behme@gmail.com> X-Mailer: git-send-email 1.7.10.4 Cc: Dirk Behme Subject: [U-Boot] [RFC PATCH] ARM: byteorder: add optimized swab16 and swab32 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Use the specialized ARM instructions for swapping 16 and 32 bit values instead of using the generic ones from include/linux/byteorder/swab.h. The x86 version in arch/x86/include/asm/byteorder.h was taken as an example for this. E.g. for the mx6qsabrelite target this results in ~4k less code. Signed-off-by: Dirk Behme --- This patch is marked as RFC due to two questions: 1) These ARM instructions are available in ARMv6 and above. Do we have to limit this code somehow to >= ARMv6? I couldn't find any #define to do this in U-Boot (?) 2) I'm not sure about the rev16. The rev16 instruction swaps *both* half words, the lower _and_ the upper one: REV16 Rd, Rm => Rd[15:8] := Rm[7:0], Rd[7:0] := Rm[15:8], Rd[31:24] := Rm[23:16], Rd[23:16] := Rm[31:24] I'm not sure if we want this? Most probably we only want to swap the lower half word with swap16()? arch/arm/include/asm/byteorder.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm/include/asm/byteorder.h b/arch/arm/include/asm/byteorder.h index c3489f1..f21baf0 100644 --- a/arch/arm/include/asm/byteorder.h +++ b/arch/arm/include/asm/byteorder.h @@ -15,6 +15,23 @@ #ifndef __ASM_ARM_BYTEORDER_H #define __ASM_ARM_BYTEORDER_H +static __inline__ __u32 ___arch__swab32(__u32 x) +{ + __asm__("rev %0,%1" /* swap bytes */ \ + : "=r" (x) \ + : "0" (x)); \ + return x; +} +#define __arch__swab32(x) ___arch__swab32(x) + +static __inline__ __u16 ___arch__swab16(__u16 x) +{ + __asm__("rev16 %0,%1" /* swap bytes */ \ + : "=r" (x) \ + : "0" (x)); \ + return x; +} +#define __arch__swab16(x) ___arch__swab16(x) #include