From patchwork Tue May 7 08:30:47 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Liu Gang X-Patchwork-Id: 242081 X-Patchwork-Delegate: afleming@freescale.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 124932C015B for ; Tue, 7 May 2013 18:47:18 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id CF0C44A237; Tue, 7 May 2013 10:47:16 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id X7jZYonO65wy; Tue, 7 May 2013 10:47:16 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 999494A254; Tue, 7 May 2013 10:47:03 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DB25B4A24E for ; Tue, 7 May 2013 10:46:57 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 7lJDkRVDQSpL for ; Tue, 7 May 2013 10:46:53 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 BL_NJABL=ERR(-1.5) (only DNSBL check requested) Received: from va3outboundpool.messaging.microsoft.com (va3ehsobe002.messaging.microsoft.com [216.32.180.12]) by theia.denx.de (Postfix) with ESMTPS id CB5D44A22D for ; Tue, 7 May 2013 10:46:35 +0200 (CEST) Received: from mail79-va3-R.bigfish.com (10.7.14.235) by VA3EHSOBE007.bigfish.com (10.7.40.11) with Microsoft SMTP Server id 14.1.225.23; Tue, 7 May 2013 08:31:20 +0000 Received: from mail79-va3 (localhost [127.0.0.1]) by mail79-va3-R.bigfish.com (Postfix) with ESMTP id 41539160156 for ; Tue, 7 May 2013 08:31:20 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1f42h1fc6h1ee6h1de0h1fdah1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1d0ch1d2eh1d3fh1155h) Received: from mail79-va3 (localhost.localdomain [127.0.0.1]) by mail79-va3 (MessageSwitch) id 1367915478261348_716; Tue, 7 May 2013 08:31:18 +0000 (UTC) Received: from VA3EHSMHS014.bigfish.com (unknown [10.7.14.237]) by mail79-va3.bigfish.com (Postfix) with ESMTP id 3785D12007F for ; Tue, 7 May 2013 08:31:18 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by VA3EHSMHS014.bigfish.com (10.7.99.24) with Microsoft SMTP Server (TLS) id 14.1.225.23; Tue, 7 May 2013 08:31:15 +0000 Received: from tx30smr01.am.freescale.net (10.81.153.31) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.2.328.11; Tue, 7 May 2013 08:31:17 +0000 Received: from linux.ap.freescale.net (linux.ap.freescale.net [10.192.208.199]) by tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id r478V2bv031051; Tue, 7 May 2013 01:31:12 -0700 From: Liu Gang To: , Date: Tue, 7 May 2013 16:30:47 +0800 Message-ID: <1367915450-17784-3-git-send-email-Gang.Liu@freescale.com> X-Mailer: git-send-email 1.7.1 In-Reply-To: <1367915450-17784-1-git-send-email-Gang.Liu@freescale.com> References: <1367915450-17784-1-git-send-email-Gang.Liu@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: R58495@freescale.com, r61911@freescale.com Subject: [U-Boot] [PATCH 3/6 v2] powerpc/b4860qds: Enable master module for boot from SRIO and PCIE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de B4860QDS can support the feature of Boot from SRIO/PCIE, and the macro "CONFIG_SRIO_PCIE_BOOT_MASTER" will enable the master module of this feature when building the u-boot image. You can get some description about this macro in README file, and for more information about the feature of Boot from SRIO/PCIE, please refer to the document doc/README.srio-pcie-boot-corenet. Signed-off-by: Liu Gang --- changes for v2: - No include/configs/B4860QDS.h | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h index b09119a..81cd584 100644 --- a/include/configs/B4860QDS.h +++ b/include/configs/B4860QDS.h @@ -64,6 +64,7 @@ #define CONFIG_SYS_SRIO #define CONFIG_SRIO1 /* SRIO port 1 */ #define CONFIG_SRIO2 /* SRIO port 2 */ +#define CONFIG_SRIO_PCIE_BOOT_MASTER #endif #define CONFIG_FSL_LAW /* Use common FSL init code */