From patchwork Thu May 2 10:59:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Behme Dirk (CM/ESO2)" X-Patchwork-Id: 240944 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 460842C00D1 for ; Thu, 2 May 2013 21:00:12 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 801F34A26D; Thu, 2 May 2013 13:00:09 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id cAGW2+jj3xpk; Thu, 2 May 2013 13:00:09 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 12AA54A27C; Thu, 2 May 2013 13:00:08 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B3BC64A26D for ; Thu, 2 May 2013 13:00:02 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id K6s31ehwcYLh for ; Thu, 2 May 2013 12:59:57 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from smtp6-v.fe.bosch.de (smtp6-v.fe.bosch.de [139.15.237.11]) by theia.denx.de (Postfix) with ESMTPS id DC5F54A1C2 for ; Thu, 2 May 2013 12:59:52 +0200 (CEST) Received: from vsmta11.fe.internet.bosch.com (unknown [10.4.98.51]) by imta23.fe.bosch.de (Postfix) with ESMTP id B861B15801B0 for ; Thu, 2 May 2013 12:59:51 +0200 (CEST) Received: from localhost (vsgw2.fe.internet.bosch.com [10.4.98.13]) by vsmta11.fe.internet.bosch.com (Postfix) with SMTP id B1A6D2380319 for ; Thu, 2 May 2013 12:59:51 +0200 (CEST) Received: from SI-HUB1000.de.bosch.com (10.4.103.106) by si-hub02.de.bosch.com (10.3.144.67) with Microsoft SMTP Server (TLS) id 8.3.298.1; Thu, 2 May 2013 12:59:49 +0200 Received: from hi-z5661.hi.de.bosch.com (10.34.217.143) by SI-HUB1000.de.bosch.com (10.4.103.106) with Microsoft SMTP Server id 14.3.123.3; Thu, 2 May 2013 12:59:49 +0200 Received: from hi-z5661.hi.de.bosch.com (localhost [127.0.0.1]) by hi-z5661.hi.de.bosch.com (Postfix) with ESMTP id 3940A41066; Thu, 2 May 2013 12:59:49 +0200 (CEST) From: Dirk Behme To: Date: Thu, 2 May 2013 12:59:46 +0200 Message-ID: <1367492386-20464-1-git-send-email-dirk.behme@de.bosch.com> X-Mailer: git-send-email 1.8.2 MIME-Version: 1.0 Cc: fabio.estevam@freescale.com, Dirk Behme Subject: [U-Boot] [PATCH] spi: mxc_spi: Fix pre and post divider calculation X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de From: Dirk Behme Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be set to 15. To calculate the post divider, divide by 15, too. And not 16. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 15 (divide by 15 => CONREG[15-12] == 14) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 30 = 2MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 15 (divide by 15 => CONREG[15-12] == 14) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 60 = 1MHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 15 (divide by 15 => CONREG[15-12] == 14) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 120 = 500kHz SPI clock Signed-off-by: Dirk Behme --- drivers/spi/mxc_spi.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/spi/mxc_spi.c b/drivers/spi/mxc_spi.c index 5bed858..8630bbd 100644 --- a/drivers/spi/mxc_spi.c +++ b/drivers/spi/mxc_spi.c @@ -128,7 +128,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, unsigned int max_hz, unsigned int mode) { u32 clk_src = mxc_get_clock(MXC_CSPI_CLK); - s32 pre_div = 0, post_div = 0, i, reg_ctrl, reg_config; + s32 pre_div = 1, post_div = 0, i, reg_ctrl, reg_config; u32 ss_pol = 0, sclkpol = 0, sclkpha = 0; struct cspi_regs *regs = (struct cspi_regs *)mxcs->base; @@ -153,7 +153,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, if (clk_src > max_hz) { pre_div = DIV_ROUND_UP(clk_src, max_hz); if (pre_div > 16) { - post_div = pre_div / 16; + post_div = pre_div / 15; pre_div = 15; } if (post_div != 0) { @@ -174,7 +174,7 @@ static s32 spi_cfg_mxc(struct mxc_spi_slave *mxcs, unsigned int cs, reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_SELCHAN(3)) | MXC_CSPICTRL_SELCHAN(cs); reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_PREDIV(0x0F)) | - MXC_CSPICTRL_PREDIV(pre_div); + MXC_CSPICTRL_PREDIV(pre_div - 1); reg_ctrl = (reg_ctrl & ~MXC_CSPICTRL_POSTDIV(0x0F)) | MXC_CSPICTRL_POSTDIV(post_div);