From patchwork Mon Mar 25 07:32:08 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josh Wu X-Patchwork-Id: 230579 X-Patchwork-Delegate: andreas.biessmann@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 4B6622C00B0 for ; Mon, 25 Mar 2013 18:34:04 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DCBDF4A058; Mon, 25 Mar 2013 08:33:37 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Pip7Sf1CRlRF; Mon, 25 Mar 2013 08:33:37 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A953A4A03B; Mon, 25 Mar 2013 08:33:27 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 324AE4A08A for ; Mon, 25 Mar 2013 08:33:23 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 83yvz6pb+K3G for ; Mon, 25 Mar 2013 08:33:20 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from eusmtp01.atmel.com (eusmtp01.atmel.com [212.144.249.242]) by theia.denx.de (Postfix) with ESMTPS id 55D2D4A048 for ; Mon, 25 Mar 2013 08:33:07 +0100 (CET) Received: from apsmtp01.atmel.com (10.168.254.31) by eusmtp01.atmel.com (10.161.101.30) with Microsoft SMTP Server id 14.2.318.4; Mon, 25 Mar 2013 08:33:06 +0100 Received: from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.atmel.com (10.168.254.31) with Microsoft SMTP Server id 14.2.318.1; Mon, 25 Mar 2013 15:32:59 +0800 From: Josh Wu To: Date: Mon, 25 Mar 2013 15:32:08 +0800 Message-ID: <1364196729-13868-4-git-send-email-josh.wu@atmel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1364196729-13868-1-git-send-email-josh.wu@atmel.com> References: <1364196729-13868-1-git-send-email-josh.wu@atmel.com> MIME-Version: 1.0 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH v3 3/4] arm: at91: add at91sam9n12 register definition X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Since at91sam9n12 is a subset of at91sam9x5, so put all at91sam9n12 definitions in at91sam9x5 head file. Signed-off-by: Josh Wu --- arch/arm/include/asm/arch-at91/at91sam9_matrix.h | 2 +- arch/arm/include/asm/arch-at91/at91sam9x5.h | 19 ++++++++++++++++--- arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h | 17 ++++++++++++++--- arch/arm/include/asm/arch-at91/hardware.h | 2 +- 4 files changed, 32 insertions(+), 8 deletions(-) diff --git a/arch/arm/include/asm/arch-at91/at91sam9_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9_matrix.h index b9a93b0..6e0bebd 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9_matrix.h +++ b/arch/arm/include/asm/arch-at91/at91sam9_matrix.h @@ -23,7 +23,7 @@ #include #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) #include -#elif defined(CONFIG_AT91SAM9X5) +#elif defined(CONFIG_AT91SAM9N12) || defined(CONFIG_AT91SAM9X5) #include #else #error "Unsupported AT91SAM9/CAP9 processor" diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5.h b/arch/arm/include/asm/arch-at91/at91sam9x5.h index b7d1932..85e42f5 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9x5.h +++ b/arch/arm/include/asm/arch-at91/at91sam9x5.h @@ -1,10 +1,10 @@ /* * Chip-specific header file for the AT91SAM9x5 family * - * Copyright (C) 2012 Atmel Corporation. + * Copyright (C) 2012-2013 Atmel Corporation. * * Definitions for the SoC: - * AT91SAM9x5 + * AT91SAM9x5 & AT91SAM9N12 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -22,10 +22,12 @@ #define ATMEL_ID_SYS 1 /* System Controller Interrupt */ #define ATMEL_ID_PIOAB 2 /* Parallel I/O Controller A and B */ #define ATMEL_ID_PIOCD 3 /* Parallel I/O Controller C and D */ -#define ATMEL_ID_SMD 4 /* SMD Soft Modem (SMD) */ +#define ATMEL_ID_SMD 4 /* SMD Soft Modem (SMD), only for AT91SAM9X5 */ +#define ATMEL_ID_FUSE 4 /* FUSE Controller, only for AT91SAM9N12 */ #define ATMEL_ID_USART0 5 /* USART 0 */ #define ATMEL_ID_USART1 6 /* USART 1 */ #define ATMEL_ID_USART2 7 /* USART 2 */ +#define ATMEL_ID_USART3 8 /* USART 3 */ #define ATMEL_ID_TWI0 9 /* Two-Wire Interface 0 */ #define ATMEL_ID_TWI1 10 /* Two-Wire Interface 1 */ #define ATMEL_ID_TWI2 11 /* Two-Wire Interface 2 */ @@ -46,6 +48,7 @@ #define ATMEL_ID_HSMCI1 26 /* High Speed Multimedia Card Interface 1 */ #define ATMEL_ID_EMAC1 27 /* Ethernet MAC1 */ #define ATMEL_ID_SSC 28 /* Synchronous Serial Controller */ +#define ATMEL_ID_TRNG 30 /* True Random Number Generator */ #define ATMEL_ID_IRQ 31 /* Advanced Interrupt Controller */ /* @@ -85,6 +88,7 @@ /* * System Peripherals */ +#define ATMEL_BASE_FUSE 0xffffdc00 #define ATMEL_BASE_MATRIX 0xffffde00 #define ATMEL_BASE_PMECC 0xffffe000 #define ATMEL_BASE_PMERRLOC 0xffffe600 @@ -111,10 +115,15 @@ */ #define ATMEL_BASE_ROM 0x00100000 /* Internal ROM base address */ #define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM base address */ + +#ifdef CONFIG_AT91SAM9N12 +#define ATMEL_BASE_OHCI 0x00500000 /* USB Host controller */ +#else /* AT91SAM9X5 */ #define ATMEL_BASE_SMD 0x00400000 /* SMD Controller */ #define ATMEL_BASE_UDPHS_FIFO 0x00500000 /* USB Device HS controller */ #define ATMEL_BASE_OHCI 0x00600000 /* USB Host controller (OHCI) */ #define ATMEL_BASE_EHCI 0x00700000 /* USB Host controller (EHCI) */ +#endif /* 9x5 series chip id definitions */ #define ARCH_ID_AT91SAM9X5 0x819a05a0 @@ -140,7 +149,11 @@ /* * Cpu Name */ +#ifdef CONFIG_AT91SAM9N12 +#define ATMEL_CPU_NAME "AT91SAM9N12" +#else /* AT91SAM9X5 */ #define ATMEL_CPU_NAME get_cpu_name() +#endif /* * Other misc defines diff --git a/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h b/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h index d6ce6fa..0d33069 100644 --- a/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h +++ b/arch/arm/include/asm/arch-at91/at91sam9x5_matrix.h @@ -1,10 +1,10 @@ /* * Matrix-centric header file for the AT91SAM9X5 family * - * Copyright (C) 2012 Atmel Corporation. + * Copyright (C) 2012-2013 Atmel Corporation. * * Memory Controllers (MATRIX, EBI) - System peripherals registers. - * Based on AT91SAM9X5 preliminary datasheet. + * Based on AT91SAM9X5 & AT91SAM9N12 preliminary datasheet. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -17,14 +17,25 @@ #ifndef __ASSEMBLY__ +/* AT91SAM9N12 Matrix definition is a subset of AT91SAM9X5. */ struct at91_matrix { u32 mcfg[16]; u32 scfg[16]; u32 pras[16][2]; u32 mrcr; /* 0x100 Master Remap Control */ - u32 filler[7]; + u32 filler[5]; +#ifdef CONFIG_AT91SAM9X5 + u32 filler1[2]; +#endif + /* EBI Chip Select Assignment Register + * 0x118: AT91SAM9N12 + * 0x120: AT91SAM9X5 + */ u32 ebicsa; u32 filler4[47]; +#ifdef CONFIG_AT91SAM9N12 + u32 filler5[2]; +#endif u32 wpmr; u32 wpsr; }; diff --git a/arch/arm/include/asm/arch-at91/hardware.h b/arch/arm/include/asm/arch-at91/hardware.h index 4c4ee70..8812b11 100644 --- a/arch/arm/include/asm/arch-at91/hardware.h +++ b/arch/arm/include/asm/arch-at91/hardware.h @@ -37,7 +37,7 @@ # include #elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45) # include -#elif defined(CONFIG_AT91SAM9X5) +#elif defined(CONFIG_AT91SAM9N12) || defined(CONFIG_AT91SAM9X5) # include #elif defined(CONFIG_AT91CAP9) # include