From patchwork Mon Feb 18 00:45:28 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Otavio Salvador X-Patchwork-Id: 221128 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id EBA852C0082 for ; Mon, 18 Feb 2013 11:41:56 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DACD94A8D3; Mon, 18 Feb 2013 01:41:47 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id njM45C2U88PK; Mon, 18 Feb 2013 01:41:47 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7C7964A889; Mon, 18 Feb 2013 01:41:33 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id A39284A879 for ; Mon, 18 Feb 2013 01:41:31 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id fAPmYOu6WL0T for ; Mon, 18 Feb 2013 01:41:30 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-gg0-f169.google.com (mail-gg0-f169.google.com [209.85.161.169]) by theia.denx.de (Postfix) with ESMTPS id DBF394A842 for ; Mon, 18 Feb 2013 01:41:19 +0100 (CET) Received: by mail-gg0-f169.google.com with SMTP id j5so833249ggn.0 for ; Sun, 17 Feb 2013 16:41:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=x-received:sender:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=DUzWMI6VniynDDvc0RXRo6nAz1IlCiZUfCt1wdBo+BU=; b=W9KQZjEg0fQVl4je27Fxiz1O/IfpoXa2NfglPn6tmDi6GC73Ff3zYlW68Iv5vcBkj1 rvaiycmt6UVz4/OmJDhTWGq+4U2NR18ftUdVApH6gu8Y5aVN7aS8Hqhl9r9vQ2kLjkzx 7G3BOivWZexA51UzEsFjgoGVIkapOh9EE4t8YzLQOV22vAWfRsBu0V3S0TwP/CcFYiyl hAX3BuqXUjUubGIYflTCnn5UluuYYZ4vWWzphS5CDWBR4lDzgwrF6nOYlrEQLMh9FXo6 NyNlF3wTFn6t7cM5LDd+cZIZmWgMpjNzMwoIN6TnaswmHX2pAQPzEJ4x8trRFJwsearW x1xw== X-Received: by 10.236.151.52 with SMTP id a40mr17715707yhk.9.1361148078855; Sun, 17 Feb 2013 16:41:18 -0800 (PST) Received: from nano.lab.ossystems.com.br ([187.23.144.59]) by mx.google.com with ESMTPS id j1sm111429376yhn.3.2013.02.17.16.41.15 (version=TLSv1.2 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 17 Feb 2013 16:41:17 -0800 (PST) From: Otavio Salvador To: U-Boot Mailing List Date: Sun, 17 Feb 2013 21:45:28 -0300 Message-Id: <1361148335-19197-4-git-send-email-otavio@ossystems.com.br> X-Mailer: git-send-email 1.8.1 In-Reply-To: <1361148335-19197-1-git-send-email-otavio@ossystems.com.br> References: <1361148335-19197-1-git-send-email-otavio@ossystems.com.br> Cc: Fabio Estevam , Marek Vasut , Otavio Salvador Subject: [U-Boot] [PATCH v4 03/10] mx23evk: Adjust DRAM control register to use full 128MB of RAM X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Adjust HW_DRAM_CTL14 to enable the chip selects to allow usage of full 128MB of RAM. Signed-off-by: Otavio Salvador --- Changes in v4: None Changes in v3: None Changes in v2: None board/freescale/mx23evk/spl_boot.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/board/freescale/mx23evk/spl_boot.c b/board/freescale/mx23evk/spl_boot.c index 6007433..b6f4e7e 100644 --- a/board/freescale/mx23evk/spl_boot.c +++ b/board/freescale/mx23evk/spl_boot.c @@ -98,6 +98,16 @@ const iomux_cfg_t iomux_setup[] = { (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), }; +#define HW_DRAM_CTL14 (0x38 >> 2) +#define CS_MAP 0x3 +#define INTAREF 0x2 +#define HW_DRAM_CTL14_CONFIG (INTAREF << 8 | CS_MAP) + +void mxs_adjust_memory_params(uint32_t *dram_vals) +{ + dram_vals[HW_DRAM_CTL14] = HW_DRAM_CTL14_CONFIG; +} + void board_init_ll(void) { mxs_common_spl_init(iomux_setup, ARRAY_SIZE(iomux_setup));