From patchwork Thu Jan 10 11:49:27 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vakul Garg X-Patchwork-Id: 210982 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 953B12C0312 for ; Thu, 10 Jan 2013 22:56:20 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2C6C24A0C0; Thu, 10 Jan 2013 12:56:17 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id D51bXm8jKXpn; Thu, 10 Jan 2013 12:56:17 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8B01D4A0C3; Thu, 10 Jan 2013 12:56:13 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AC37C4A0C3 for ; Thu, 10 Jan 2013 12:52:02 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id oYQutgvMXH-s for ; Thu, 10 Jan 2013 12:52:02 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from tx2outboundpool.messaging.microsoft.com (tx2ehsobe002.messaging.microsoft.com [65.55.88.12]) by theia.denx.de (Postfix) with ESMTPS id 274E54A0C0 for ; Thu, 10 Jan 2013 12:52:00 +0100 (CET) Received: from mail242-tx2-R.bigfish.com (10.9.14.243) by TX2EHSOBE009.bigfish.com (10.9.40.29) with Microsoft SMTP Server id 14.1.225.23; Thu, 10 Jan 2013 11:51:58 +0000 Received: from mail242-tx2 (localhost [127.0.0.1]) by mail242-tx2-R.bigfish.com (Postfix) with ESMTP id A07F860107; Thu, 10 Jan 2013 11:51:58 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 3 X-BigFish: VS3(z37d5kzzz1ee6h1de0h1202h1e76h1d1ah1d2ahzz8275bhz2dh2a8h668h839hd24he5bhf0ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1155h) Received: from mail242-tx2 (localhost.localdomain [127.0.0.1]) by mail242-tx2 (MessageSwitch) id 1357818716989941_6152; Thu, 10 Jan 2013 11:51:56 +0000 (UTC) Received: from TX2EHSMHS033.bigfish.com (unknown [10.9.14.241]) by mail242-tx2.bigfish.com (Postfix) with ESMTP id E7DA92600D2; Thu, 10 Jan 2013 11:51:56 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS033.bigfish.com (10.9.99.133) with Microsoft SMTP Server (TLS) id 14.1.225.23; Thu, 10 Jan 2013 11:51:56 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.2.318.3; Thu, 10 Jan 2013 11:51:56 +0000 Received: from b16394-desktop.ap.freescale.net (b16394-desktop.ap.freescale.net [10.232.132.33]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id r0ABprrf006121; Thu, 10 Jan 2013 04:51:54 -0700 From: Vakul Garg To: Date: Thu, 10 Jan 2013 17:19:27 +0530 Message-ID: <1357818567-10574-1-git-send-email-vakul@freescale.com> X-Mailer: git-send-email 1.7.7.6 MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-Mailman-Approved-At: Thu, 10 Jan 2013 12:56:12 +0100 Cc: Andy Fleming Subject: [U-Boot] [PATCH] powerpc/mpc85xx: Add property 'fsl, sec-era' in device tree node 'crypto'. X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de If property 'fsl,sec-era' is already present, it is updated. This property is required so that applications can ascertain which descriptor commands are supported on a particular CAAM version. Signed-off-by: Vakul Garg Cc: Andy Fleming --- arch/powerpc/cpu/mpc85xx/fdt.c | 8 +++ arch/powerpc/cpu/mpc8xxx/fdt.c | 78 ++++++++++++++++++++++++++++++++- arch/powerpc/include/asm/immap_85xx.h | 6 +++ 3 files changed, 91 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c index 5af2661..e7b5dfd 100644 --- a/arch/powerpc/cpu/mpc85xx/fdt.c +++ b/arch/powerpc/cpu/mpc85xx/fdt.c @@ -591,6 +591,14 @@ void ft_cpu_setup(void *blob, bd_t *bd) /* delete crypto node if not on an E-processor */ if (!IS_E_PROCESSOR(get_svr())) fdt_fixup_crypto_node(blob, 0); +#if CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC 4.x/5.x */ + else { + ccsr_sec_t *sec; + + sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR; + fdt_fixup_crypto_node(blob, in_be32(&sec->secvid_ms)); + } +#endif fdt_fixup_ethernet(blob); diff --git a/arch/powerpc/cpu/mpc8xxx/fdt.c b/arch/powerpc/cpu/mpc8xxx/fdt.c index 68db8e2..20cbb45 100644 --- a/arch/powerpc/cpu/mpc8xxx/fdt.c +++ b/arch/powerpc/cpu/mpc8xxx/fdt.c @@ -297,10 +297,86 @@ void fdt_fixup_crypto_node(void *blob, int sec_rev) fdt_strerror(err)); } #elif CONFIG_SYS_FSL_SEC_COMPAT >= 4 /* SEC4 */ +static u8 caam_get_era(void) +{ + static const struct { + u16 ip_id; + u8 maj_rev; + u8 era; + } caam_eras[] = { + {0x0A10, 1, 1}, + {0x0A10, 2, 2}, + {0x0A12, 1, 3}, + {0x0A14, 1, 3}, + {0x0A14, 2, 4}, + {0x0A16, 1, 4}, + {0x0A10, 3, 4}, + {0x0A11, 1, 4}, + {0x0A18, 1, 4}, + {0x0A11, 2, 5}, + {0x0A12, 2, 5}, + {0x0A13, 1, 5}, + {0x0A1C, 1, 5} + }; + + ccsr_sec_t *sec = (void __iomem *)CONFIG_SYS_FSL_SEC_ADDR; + u32 secvid_ms = in_be32(&sec->secvid_ms); + u32 ccbvid = in_be32(&sec->ccbvid); + u16 ip_id = (secvid_ms & SEC_SECVID_MS_IPID_MASK) >> + SEC_SECVID_MS_IPID_SHIFT; + u8 maj_rev = (secvid_ms & SEC_SECVID_MS_MAJ_REV_MASK) >> + SEC_SECVID_MS_MAJ_REV_SHIFT; + u8 era = (ccbvid & SEC_CCBVID_ERA_MASK) >> SEC_CCBVID_ERA_SHIFT; + + int i; + + if (era) /* This is '0' prior to CAAM ERA-6 */ + return era; + + for (i = 0; i < ARRAY_SIZE(caam_eras); i++) + if (caam_eras[i].ip_id == ip_id && + caam_eras[i].maj_rev == maj_rev) + return caam_eras[i].era; + + return 0; +} + +static void fdt_fixup_crypto_era(void *blob, u32 era) +{ + int err; + int crypto_node; + + crypto_node = fdt_path_offset(blob, "crypto"); + if (crypto_node < 0) { + printf("WARNING: Missing crypto node\n"); + return; + } + + err = fdt_setprop(blob, crypto_node, "fsl,sec-era", &era, + sizeof(era)); + if (err < 0) { + printf("ERROR: could not set fsl,sec-era property: %s\n", + fdt_strerror(err)); + } +} + void fdt_fixup_crypto_node(void *blob, int sec_rev) { - if (!sec_rev) + u8 era; + + if (!sec_rev) { fdt_del_node_and_alias(blob, "crypto"); + return; + } + + /* Add SEC ERA information in compatible */ + era = caam_get_era(); + if (era) { + fdt_fixup_crypto_era(blob, era); + } else { + printf("WARNING: Unable to get ERA for CAAM rev: %d\n", + sec_rev); + } } #endif diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 70608fe..6b2c05c 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -2757,6 +2757,12 @@ typedef struct ccsr_sec { #define SEC_CHANUM_MS_JRNUM_SHIFT 28 #define SEC_CHANUM_MS_DECONUM_MASK 0x0f000000 #define SEC_CHANUM_MS_DECONUM_SHIFT 24 +#define SEC_SECVID_MS_IPID_MASK 0xffff0000 +#define SEC_SECVID_MS_IPID_SHIFT 16 +#define SEC_SECVID_MS_MAJ_REV_MASK 0x0000ff00 +#define SEC_SECVID_MS_MAJ_REV_SHIFT 8 +#define SEC_CCBVID_ERA_MASK 0xff000000 +#define SEC_CCBVID_ERA_SHIFT 24 #endif typedef struct ccsr_qman {