From patchwork Fri Dec 7 10:21:24 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chander Kashyap X-Patchwork-Id: 204445 X-Patchwork-Delegate: promsoft@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D7D012C00C8 for ; Fri, 7 Dec 2012 21:22:01 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 581F14A159; Fri, 7 Dec 2012 11:22:00 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id uMUWb6jQwBg1; Fri, 7 Dec 2012 11:22:00 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AD85B4A14E; Fri, 7 Dec 2012 11:21:58 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 63D184A146 for ; Fri, 7 Dec 2012 11:21:57 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id jKf7GmPM9svH for ; Fri, 7 Dec 2012 11:21:56 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f44.google.com (mail-pa0-f44.google.com [209.85.220.44]) by theia.denx.de (Postfix) with ESMTPS id 254764A14F for ; Fri, 7 Dec 2012 11:21:51 +0100 (CET) Received: by mail-pa0-f44.google.com with SMTP id hz11so376030pad.3 for ; Fri, 07 Dec 2012 02:21:50 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :x-gm-message-state; bh=CH9W5X+W3RC1PkfkWriV19kCzww2JSnlEJrdspDwp5k=; b=OlvXHG/I1xVEAzzAw5onk1neTUK9qxsOaVz4waUxfl7dQV0Kgov2TMlAk+ciBS2vip B/02NmJpqNK2F8K2X6HZvjkmyaUwJY/A7kg3YaalJLvrCQSTEuAj0sXukVlP9N1tpdrv vsx/GXUwGOrQ6oEG3dOoP/ZLvI24R+bR15QdqNgX9koBjeau2ikXpGidofyYPwuCfpaj jwdnmaWkQHwHQENWrfjYQHCsKUAIXW6pnIvFu5oIYJMSW3+Lde/BWzfxTkB1Kh6KLxN8 Cocdb19XIoDSSLmIci8d3LrTIYYfm7cijAkqf50Tv92H+8pb+sM90dY+aAj48Eoccc6x yOVg== Received: by 10.68.219.164 with SMTP id pp4mr14436141pbc.72.1354875710434; Fri, 07 Dec 2012 02:21:50 -0800 (PST) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPS id nf9sm6477575pbc.17.2012.12.07.02.21.47 (version=SSLv3 cipher=OTHER); Fri, 07 Dec 2012 02:21:49 -0800 (PST) From: Chander Kashyap To: u-boot@lists.denx.de Date: Fri, 7 Dec 2012 15:51:24 +0530 Message-Id: <1354875686-31703-2-git-send-email-chander.kashyap@linaro.org> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1354875686-31703-1-git-send-email-chander.kashyap@linaro.org> References: <1354875686-31703-1-git-send-email-chander.kashyap@linaro.org> X-Gm-Message-State: ALoCoQk0UF1uhsVxP+yvDzVHCEzkyr33mq4GXCrFKC+QtBJaeeCGAappWGENgsKdNaXzKh5WOJ7q Cc: linaro-dev@lists.linaro.org, patches@linaro.org Subject: [U-Boot] [Resend Patch v2 1/3] EXYNOS: EXYNOS4X12: Populate Exynos4x12 register addresses X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de This patch populates base addresses of Exynos4x12 registers. Signed-off-by: Chander Kashyap --- arch/arm/include/asm/arch-exynos/cpu.h | 48 +++++++++++++++++++++++++++----- 1 file changed, 41 insertions(+), 7 deletions(-) diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index d1b2ea8..86c7905 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -27,7 +27,7 @@ #define EXYNOS_CPU_NAME "Exynos" #define EXYNOS4_ADDR_BASE 0x10000000 -/* EXYNOS4 */ +/* EXYNOS4 Common*/ #define EXYNOS4_GPIO_PART3_BASE 0x03860000 #define EXYNOS4_PRO_ID 0x10000000 #define EXYNOS4_SYSREG_BASE 0x10010000 @@ -61,7 +61,37 @@ #define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_SPI_ISP_BASE DEVICE_NOT_AVAILABLE -/* EXYNOS5 */ +/* EXYNOS4X12 */ +#define EXYNOS4X12_GPIO_PART3_BASE 0x03860000 +#define EXYNOS4X12_PRO_ID 0x10000000 +#define EXYNOS4X12_SYSREG_BASE 0x10010000 +#define EXYNOS4X12_POWER_BASE 0x10020000 +#define EXYNOS4X12_SWRESET 0x10020400 +#define EXYNOS4X12_USBPHY_CONTROL 0x10020704 +#define EXYNOS4X12_CLOCK_BASE 0x10030000 +#define EXYNOS4X12_SYSTIMER_BASE 0x10050000 +#define EXYNOS4X12_WATCHDOG_BASE 0x10060000 +#define EXYNOS4X12_DMC0_BASE 0x10600000 +#define EXYNOS4X12_DMC1_BASE 0x10610000 +#define EXYNOS4X12_GPIO_PART4_BASE 0x106E0000 +#define EXYNOS4X12_GPIO_PART2_BASE 0x11000000 +#define EXYNOS4X12_GPIO_PART1_BASE 0x11400000 +#define EXYNOS4X12_FIMD_BASE 0x11C00000 +#define EXYNOS4X12_MIPI_DSIM_BASE 0x11C80000 +#define EXYNOS4X12_USBOTG_BASE 0x12480000 +#define EXYNOS4X12_MMC_BASE 0x12510000 +#define EXYNOS4X12_SROMC_BASE 0x12570000 +#define EXYNOS4X12_USB_HOST_EHCI_BASE 0x12580000 +#define EXYNOS4X12_USBPHY_BASE 0x125B0000 +#define EXYNOS4X12_UART_BASE 0x13800000 +#define EXYNOS4X12_I2C_BASE 0x13860000 +#define EXYNOS4X12_PWMTIMER_BASE 0x139D0000 + +#define EXYNOS4X12_ADC_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_DP_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_MODEM_BASE DEVICE_NOT_AVAILABLE + +/* EXYNOS5 Common*/ #define EXYNOS5_I2C_SPACING 0x10000 #define EXYNOS5_GPIO_PART4_BASE 0x03860000 @@ -152,17 +182,21 @@ static inline int proid_is_##type(void) \ } IS_EXYNOS_TYPE(exynos4210, 0x4210) +IS_EXYNOS_TYPE(exynos4412, 0x4412) IS_EXYNOS_TYPE(exynos5250, 0x5250) #define SAMSUNG_BASE(device, base) \ static inline unsigned int samsung_get_base_##device(void) \ { \ - if (cpu_is_exynos4()) \ - return EXYNOS4_##base; \ - else if (cpu_is_exynos5()) \ + if (cpu_is_exynos4()) { \ + if (proid_is_exynos4412()) \ + return EXYNOS4X12_##base; \ + else \ + return EXYNOS4_##base; \ + } else if (cpu_is_exynos5()) { \ return EXYNOS5_##base; \ - else \ - return 0; \ + } \ + return 0; \ } SAMSUNG_BASE(adc, ADC_BASE)