From patchwork Fri Aug 17 15:31:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhi-zhou Zhang X-Patchwork-Id: 178267 X-Patchwork-Delegate: daniel.schwierzeck@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id D2A8A2C00A1 for ; Sat, 18 Aug 2012 01:36:33 +1000 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D89AA28545; Fri, 17 Aug 2012 17:35:40 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id W4m6s8ZfzES8; Fri, 17 Aug 2012 17:35:40 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ACD7D28432; Fri, 17 Aug 2012 17:34:28 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 2EDAC2841B for ; Fri, 17 Aug 2012 17:34:24 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id DFvVP7A7cCwL for ; Fri, 17 Aug 2012 17:34:24 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-gh0-f172.google.com (mail-gh0-f172.google.com [209.85.160.172]) by theia.denx.de (Postfix) with ESMTPS id E660D28392 for ; Fri, 17 Aug 2012 17:33:43 +0200 (CEST) Received: by ghbg16 with SMTP id g16so4550033ghb.3 for ; Fri, 17 Aug 2012 08:33:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; bh=COJVmz0L5vw3hiVDw1sVbCWNcXYm6rUjgy1pTm1G4is=; b=sQg5PmnxACciwBgI13H829HTEA5ZVkeU+PA2gmGpZ3zry2vTA5HZ6zrgNwGKoE5jGj 3W5N1Wmbj9NkxL+uycjCvC+uJlyLvIt668PDjBw2Dl39P033dgulABKMnDTDZ0t6gWhI m25Zf2eERLmX2v8OT/XVvTH4U7D9Vo32BUpe+SvQw4yOjdRADkw2llc9KyGprTXvdl9e 0ki2ERhvsDbKrAAT5HeeDIfiINhnFU32FDuxjKvUFxsXrFVNE0QcKg8SY/Cw0m2HvBhq tM4W7pyScEKqozNgznyk4Gw+aQ7i56bhm7phRjYyfglVKJozmI8odELb1u7bAhkaM1Hg hXjw== Received: by 10.66.87.2 with SMTP id t2mr10436828paz.6.1345217621778; Fri, 17 Aug 2012 08:33:41 -0700 (PDT) Received: from localhost.localdomain ([124.165.216.64]) by mx.google.com with ESMTPS id ka9sm5109862pbb.59.2012.08.17.08.33.37 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 17 Aug 2012 08:33:41 -0700 (PDT) From: Zhizhou Zhang To: u-boot@lists.denx.de Date: Fri, 17 Aug 2012 23:31:10 +0800 Message-Id: <1345217476-32034-28-git-send-email-etou.zh@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1345217476-32034-1-git-send-email-etou.zh@gmail.com> References: <1345217476-32034-1-git-send-email-etou.zh@gmail.com> Subject: [U-Boot] [[Patch V2] mips: 10/16] modify io operation for mips64 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de Signed-off-by: Zhizhou Zhang --- arch/mips/include/asm/io.h | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 025012a..1b82c61 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -120,12 +120,20 @@ static inline void set_io_port_base(unsigned long base) */ extern inline phys_addr_t virt_to_phys(volatile void * address) { +#ifndef CONFIG_64BIT return CPHYSADDR(address); +#else + return XPHYSADDR(address); +#endif } extern inline void * phys_to_virt(unsigned long address) { - return (void *)KSEG0ADDR(address); +#ifndef CONFIG_64BIT + return (void *)KSEG0ADDR(address); +#else + return (void *)CKSEG0ADDR(address); +#endif } /* @@ -133,12 +141,20 @@ extern inline void * phys_to_virt(unsigned long address) */ extern inline unsigned long virt_to_bus(volatile void * address) { +#ifndef CONFIG_64BIT return CPHYSADDR(address); +#else + return XPHYSADDR(address); +#endif } extern inline void * bus_to_virt(unsigned long address) { +#ifndef CONFIG_64BIT return (void *)KSEG0ADDR(address); +#else + return (void *)CKSEG0ADDR(address); +#endif } /*